TQ TQMx50UC, Руководство пользователя

Страница: 22 / 36

User's Manual l TQMx50UC UM 0101 l © 2018 TQ-Group Page 18
Table 10: COM Express™ Connector Pin Assignment (continued)
Pin Pin-Signal Description Type Remark
B56 PCIE_RX4– PCI Express differential receive pairs I N/A
B57 GPO2 / SD_WP GPO2 / SDIO Write Protect O PD TQ-flexiCFG
B58 P PCI Express differential receive pairs I
B59 PCIE_RX3– PCI Express differential receive pairs I
B60 GND(FIXED) Ground GND
B61 P PCI Express differential receive pairs I
B62 PCIE_RX2– PCI Express differential receive pairs I
B63 GPO3/SD_CD# GPO3 / SDIO Card Detect O PD TQ-flexiCFG
B64 P PCI Express differential receive pairs I
B65 PCIE_RX1– PCI Express differential receive pairs I
B66 WAKE0# PCI Express wake up signal I PU TQ-flexiCFG
B67 WAKE1# General purpose wake up signal I PU TQ-flexiCFG
B68 P PCI Express differential receive pairs I
B69 PCIE_RX0– PCI Express differential receive pairs I
B70 GND(FIXED) Ground GND
B71 LVDS Channel B differential pairs 0 O
B72 LVDS_B0– LVDS Channel B differential pairs 0 O
B73 LVDS Channel B differential pairs 1 O
B74 LVDS_B1– LVDS Channel B differential pairs 1 O
B75 LVDS Channel B differential pairs 2 O
B76 LVDS_B2– LVDS Channel B differential pairs 2 O
B77 LVDS Channel B differential pairs 3 O
B78 LVDS_B3– LVDS Channel B differential pairs 3 O
B79 LVDS_BKLT_EN LVDS panel backlight enable O
B80 GND(FIXED) Ground GND
B81 LV LVDS Channel B differential clock O
B82 LVDS_B_CK– LVDS Channel B differential clock O
B83 LVDS_BKLT_CTRL LVDS panel backlight brightness control O
B84 VCC_5V_SBY Standby power input: +5.0 V nominal PWR
B85 VCC_5V_SBY Standby power input: +5.0 V nominal PWR
B86 VCC_5V_SBY Standby power input: +5.0 V nominal PWR
B87 VCC_5V_SBY Standby power input: +5.0 V nominal PWR
B88 BIOS_DIS1# Selection straps to determine the BIOS boot device I PU
B89 VGA_RED Red for monitor O N/A
B90 GND(FIXED) Ground GND
B91 VGA_GRN Green for monitor O N/A
B92 VGA_BLU Blue for monitor O N/A
B93 VGA_HSYNC Horizontal sync output to VGA monitor O N/A
B94 VGA_VSYNC Vertical sync output to VGA monitor O N/A
B95 VGA_I2C_CK DDC clock line O N/A
B96 VGA_I2C_DAT DDC data line I/O N/A
B97 SPI_CS# Chip select for Carrier Board SPI O
B98 (RSVD) SER0_RTS# Serial port 0 Request To Send O TQ-flexiCFG
B99 (RSVD) SER0_CTS# Serial port 0 Clear To Send I PU TQ-flexiCFG
B100 GND(FIXED) Ground GND
B101 FAN_PWMOUT Fan Pulse Width Modulation speed control output O
B102 FAN_TACHIN Fan tachometer input I PU
B103 SLEEP# Sleep button I PU
B104 VCC_12V Primary wide power input PWR
B105 VCC_12V Primary wide power input PWR
B106 VCC_12V Primary wide power input PWR
B107 VCC_12V Primary wide power input PWR
B108 VCC_12V Primary wide power input PWR
B109 VCC_12V Primary wide power input PWR
B110 GND(FIXED) Ground GND