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Preliminary User's Manual l TQMLS1028A UM 0001 l © 2019, TQ-Systems GmbH
Page 12
4.8
EEPROM
4.8.1
Data EEPROM 24LC256T
The EEPROM is empty on delivery.
•
256 Kbit or not assembled
•
3 decoded address lines
•
Connected to I
2
C controller 1 of the CPU
•
Device address is
4.8.2
Configuration EEPROM SE97B
The temperature sensor SE97BTP also contains a 2 Kbit (256 × 8 Bit) EEPROM. The EEPROM is divided into two parts.
The lower 128 bytes (00h to 7Fh) can be set to Permanent Write Protected (PWP) mode or Reversible Write Protected (RWP)
mode by software. The upper 128 bytes (80h to FFh) cannot be write-protected and can be used for general data storage.
Illustration 9:
Memory Map SE97BTP EEPROM
The EEPROM can be accessed with the following two I
2
C addresses.
•
EEPROM (Normal Mode):
•
EEPROM (Protected Mode):
The configuration EEPROM contains a standard reset configuration at delivery. The configuration EEPROM is only one of several
options for storing the reset configuration.
By means of the standard reset configuration in the EEPROM, a correctly configured system can always be achieved by simply
changing the Reset Configuration Source.
If the Reset Configuration Source is selected accordingly, 4 + 4 + 64 + 8 bytes = 80 bytes are required for the reset configuration.
It can also be used for the Pre-Boot Loader PBL.