User's Manual l MBLX2160A UM 0101 l © 2022, TQ-Systems GmbH
Page 34
3.9.9
Headers
On the MBLX2160A four pin headers are installed, whose signals are grouped as shown below:
•
Supply voltages: X31
•
CPU signals after muxing: X27, X28
•
Module debug signals: X30
Table 20:
Pinout 40-pin header, X27
Signal
Pin
Signal
UART1_SOUT
1
2
SDHC2_DATA0
UART1_SIN
3
4
SDHC2_DATA1
UART2_SOUT
5
6
SDHC2_DATA2
UART2_SIN
7
8
SDHC2_DATA3
DGND
9
10
SDHC2_DATA4
UART3_SOUT
11
12
SDHC2_DATA5
UART3_SIN
13
14
SDHC2_DATA6
UART4_SOUT
15
16
SDHC2_DATA7
UART4_SIN
17
18
SDHC2_CMD
DGND
19
20
SDHC2_DS
CAN2_TX_MUX
21
22
SDHC2_CLK
CAN2_RX_MUX
23
24
SDHC1_CD#
CAN1_TX_MUX
25
26
SDHC1_WP
CAN1_RX_MUX
27
28
SDHC1_DS
DGND
29
30
DGND
RTC_CLKOUT
31
32
SDHC1_DATA4
(NC)
33
34
SDHC1_DATA5
TA_TMP_DETECT#
35
36
SDHC1_DATA6
TA_BB_TMP_DETECT
37
38
SDHC1_DATA7
DGND
39
40
DGND
Table 21:
Pinout 40-pin header, X28
Signal
Pin
Signal
GPIO3_DATA08
1
2
IRQ_0
GPIO3_DATA09
3
4
IRQ_1
GPIO3_DATA10
5
6
IRQ_2
EVT0#
7
8
IRQ_3
DGND
9
10
DGND
EVT1#
11
12
IRQ_4
EVT2#
13
14
IRQ_5
EVT3#
15
16
IRQ_6
EVT4#
17
18
IRQ_7
DGND
19
20
DGND
EVENT_TEMPSENSOR#
21
22
INT_PORTEXPANDER#
EEPROM_WP
23
24
INT_I2C_MUX#
RTC_INT_OUT
25
26
I2C1_CPU_SCL
CLK_OUT
27
28
I2C1_CPU_SDA
DGND
29
30
DGND
HRESET_OUT#
31
32
LX_CONFIG_RFU2
LX_CPU_RESET_REQ_OUT#
33
34
LX_CONFIG_RFU3
LX_CPU_RESET_OUT#
35
36
LX_CONFIG_RFU4
TQMLX_RST_IN#
37
38
LX_CONFIG_RFU5
DGND
39
40
DGND