User's Manual l MBLX2160A UM 0101 l © 2022, TQ-Systems GmbH
Page 20
3.5
SerDes
3.5.1
SerDes Multiplexing options
The LX2160A provides three SerDes blocks with eight lanes each.
No AC coupling capacitors are assembled on the TQMLX2160A. These have to be populated on the carrier board.
The following tables show the SerDes multiplexing options.
Table 11:
SerDes Block 1 multiplexing options
Front Side Left SERDES1 (×8)
0
1
2
3
4
5
6
7
H
G
F
E
D
C
B
A
1
PCIe.1 ×4
PCIe.2 ×4
2
SGMII.3
SGMII.4
SGMII.5
SGMII.6
PCIe.2 ×4
3
USXGMII / XFI.3
USXGMII / XFI.4
USXGMII / XFI.5
USXGMII / XFI.6
PCIe.2 ×4
4
SGMII.3
SGMII.4
SGMII.5
SGMII.6
SGMII.7
SGMII.8
SGMII.9
SGMII.10
5
PCIe.1 ×4
USXGMII / XFI.7
USXGMII / XFI.8
USXGMII / XFI.9 USXGMII / XFI.10
6
USXGMII / XFI.3
USXGMII / XFI.4
SGMII.3
SGMII.3
SGMII.7
SGMII.8
SGMII.9
SGMII.10
7
USXGMII / XFI.3
USXGMII / XFI.4
USXGMII / XFI.5
USXGMII / XFI.6
SGMII.7
SGMII.8
SGMII.9
SGMII.10
8
USXGMII / XFI.3
USXGMII / XFI.4
USXGMII / XFI.5
USXGMII / XFI.6
USXGMII / XFI.7
USXGMII / XFI.8
USXGMII / XFI.9 USXGMII / XFI.10
9
PCIe.1 ×1
SGMII.4
SGMII.5
SGMII.6
PCIe.2 ×1
SGMII.8
SGMII.9
SGMII.10
10
PCIe.2 ×1 (gen 1,2) USXGMII / XFI.4
USXGMII / XFI.5
USXGMII / XFI.6 PCIe.2 ×1 (gen 1,2) USXGMII / XFI.8
USXGMII / XFI.9 USXGMII / XFI.10
11
PCIe.1 ×2
SGMII.5
SGMII.6
PCIe.2 ×2
SGMII.9
SGMII.10
12
PCIe.1 ×4
PCIe.2 ×2
SGMII.9
SGMII.10
13
100GE.1
100GE.2
14
100GE.1
PCIe.2 ×4
15
50GE.1
50GE.2
PCIe.2 ×4
16
50GE.1
25GE.5
25GE.6
PCIe.2 ×4
17
25GE.3
25GE.4
25GE.5
25GE.6
PCIe.2 ×4
18
USXGMII / XFI.3
USXGMII / XFI.4
25GE.5
25GE.6
USXGMII / XFI.7
USXGMII / XFI.8
USXGMII / XFI.9 USXGMII / XFI.10
19
USXGMII / XFI.3
USXGMII / XFI.4
25GE.5
25GE.6
40GE.2
20
40GE.1
40GE.2
21
25GE.3
25GE.4
25GE.5
25GE.6
PCIe.2 ×2
25GE.9
25GE.10
22
USXGMII / XFI.3
USXGMII / XFI.4
USXGMII / XFI.5
USXGMII / XFI.6
PCIe.2 ×2
USXGMII / XFI.9 USXGMII / XFI.10
Table 12:
SerDes Block 2 multiplexing options
Front Side Right SERDES2 (×8)
0
1
2
3
4
5
6
7
A
B
C
D
E
F
G
H
1
PCIe.3 ×2 (gen 1,2)
SATA.1
SATA.2
PCIe.4 ×4 (gen 1,2)
2
PCIe.3 ×8
3
PCIe.3 ×4
PCIe.4 ×4
4
PCIe.3 ×4 (gen 1,2)
PCIe.4 ×2 (gen 1,2)
SATA.1
SATA.2
5
PCIe.3 ×4
SATA.3
SATA.4
SATA.1
SATA.2
6
PCIe.3 ×4 (gen 1,2)
SGMII.15
SGMII.16
USXGMII / XFI.13 USXGMII / XFI.14
7
PCIe.3 ×1 (gen 1,2)
SGMII.12
SGMII.17
SGMII.18
PCIe.4 ×1 (gen 1,2)
SGMII.16
USXGMII / XFI.13 USXGMII / XFI.14
8
X
X
SATA.1
SATA.2
SATA.3
SATA.4
USXGMII / XFI.13 USXGMII / XFI.14
9
SGMII.11
SGMII.12
SGMII.17
SGMII.18
SGMII.15
SGMII.16
SGMII.13
SGMII.14
10
SGMII.11
SGMII.12
SGMII.17
SGMII.18
PCIe.2 ×4
11
PCIe.3 ×1
SGMII.12
SGMII.17
SGMII.18
PCIe.4 ×1
SGMII.16
SGMII.13
SGMII.14
12
SGMII.11
SGMII.12
SGMII.17
SGMII.18
PCIe.4 ×2 (gen 1,2)
SATA.1
SATA.2
13
PCIe.3 ×4
PCIe.4 ×2
SGMII.13
SGMII.14
14
PCIe.3 ×2
SGMII.17
SGMII.18
PCIe.4 ×2
SGMII.13
SGMII.14
Table 13:
SerDes Block 3 multiplexing options
Back Side SERDES3 (×8)
0
1
2
3
4
5
6
7
A
B
C
D
E
F
G
H
1
PCIe.5 ×8
2
PCIe.5 ×4
PCIe.6 ×4