User's Manual l MBa7x UM 0101 l © 2020, TQ-Systems GmbH
Page 24
4.2
Communication interfaces
4.2.1
USB 2.0 Hi-Speed Host
The TQMa7x provides a chip-to-chip connection for USB via HSIC.
The HSIC USB hub USB4604 offers four USB 2.0 Hi-Speed host interfaces. (One upstream port, four downstream ports.)
The USB connectors are supplied with 5 V via power distribution switches. These switches provide current monitoring and can
switch off the bus voltage in case of an overload and/or overheating.
For detailed information, refer to the MIC2026 switch Data Sheets.
USB Hosts 1 & 2 are connected to the stacked USB Type A socket X4
USB Host 1 is the lower Type A connector, USB Host 2 is the upper Type A connector
USB Host 3 is routed to LVDS-CMD connector X16
USB Host 4 is routed to header X23
The firmware required by the USB hub is loaded by default from its own internal memory. As an assembly option, the USB hub
can be connected to the I2C2 bus on the MBa7x. In this case, the firmware can also be loaded into the hub via this bus when the
system is started. Further information can be found in the Data Sheets of the USB4604 (9) and the current MBa7x circuit diagram.
TQMa7x
HSIC
CMC
Power Switch
CMC
USB1
USB2
Stacked USB
Type A
(X4)
PWR
CMC
CMC
USB3
USB4
Header
LVDS (X16)
Header
(X23)
Power Switch
Power Switch
USB4604
Figure 13: Block diagram USB-Hosts
The USB Host port of the TQMa7x provides a theoretical data rate of 480 Mbit/s. The data rate is shared amongst the connected
ports. The data rates of the ports can significantly deviate depending on the hardware and software used.
Table 18:
Characteristics USB Host
Parameter
Min.
Typ.
Max.
Unit
Remark
Voltage
4.75
5.00
5.25
V
–
Current
–
500
900
mA
–
Load step change
–
–90
–
mV
Load step of 500 mA
Read rate
–
27
–
Mbyte/s
USB-HDD at Port 2: 2 Gbyte file, 10 Mbyte block size
Write rate
–
22
–
Mbyte/s
USB-HDD at Port 2: 2 Gbyte file, 16 Mbyte block size
