Toshiba MAGNIA 510D, Руководство пользователя

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System Configuration Setup
Setup
77
Chipset Features Setup
Sample Chipset screen
❖
Top Performance - Determines memory access speed.
❖
SDRAM Timing by SPD - Determines if SPD (Serial Presence Detect) controls
SDRAM timing.
❖
SDRAM CAS Latency Time
❖
CPU/DRAM Frequency
CAUTION: The settings shown are the recommended values. Do not use other
values unless you have specific technical knowledge and experience with chipset
configuration.
Enabled Sets the access speed to maximum.
Disabled
(default) Disables this option.
Enabled
(default) SPD used to control SDRAM timing.
Disabled SPD not used to control SDRAM timing.
3 For 67/83 MHz SDRAM DIMM module
2 For 100 MHz SDRAM DIMM module
Auto (default) CAS latency time will be set automatically if
you have SPD on SDRAM
Auto (default) CPU/DRAM speed is automatically set.
AMIBIOS SETUP - CHIPSET FEATURE CMOS SETUP
(C)1999 American Megatrends, Inc. All Rights Reserved
*** DRAM Timing ***
Top Performance :Disabled
SDRAM Timing by SPD :Enabled
SDRAM CAS# Latency :Auto
CPU/DRAM Frequency :Auto
C2P Concurrency & Master :Enabled
DRAM Integrity Mode
:Ecc
AGP Mode :4X
AGP Comp.Driving :Auto
Manual AGP Comp.Driving :CB
AGP Aperture Size
:64MB
USB Controller :USB Port0&1
USB Legacy Support :Disabled
ESC : Quit
↑↓←→
: Select Item
F1 : Help PU/PD/+/- : Modify
F5 : Old Values (Shift)F2 : Color
F6 : Load BIOS Defaults
F7 : Load Setup Defaults