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Boards
© Tibbo Technology Inc.
5.1.1.1
General-purpose I/O Lines
The EM2001 has 56 general-purpose I/O lines (GPIO0 - GPIO55). All lines are 3.3V,
CMOS, 5V-tolerant lines. The maximum load current for each I/O line is 10mA. Fifty
one of these lines are always available. Remaining five lines are located on the
and can be used if no wireless add-on module is installed.
The simplified structure of one I/O line of the EM2001 is shown on the circuit
diagram below. Each line has an independent output buffer control. When the
EM2001 powers up, all its I/O lines have their output buffers tri-stated (in other
words, all I/O lines are configured as inputs). You need to explicitly enable the
output buffer of a certain I/O line if you want this line to become an output.
Many I/O lines of the EM2001 also serve as inputs or outputs of special function
modules, such as serial ports. Majority of those lines need to be correctly configured
as inputs or outputs — this won't happen automatically. Several lines — such as TX
and RX lines of the serial port when in the UART mode — are configured as outputs
and inputs automatically when the serial port (or some other hardware block) is
enabled. For details see "Platform-dependent Programming Information inside the
EM2000 platform documentation (TIDE, TiOS, Tibbo BASIC, and Tibbo C Manual).
Each I/O line has a weak pull-up resistor that prevents the line from floating when
the output buffer is tri-stated.
8-bit ports
Forty I/O lines are grouped into five 8-bit ports. To preserve compatibility with the
board, the grouping of I/O lines into ports is exactly the same as on the
EM1001. Unfortunately, this preservation of compatibility has turned the ports of
the EM2001 into "pseudo ports", meaning that GPIO lines of these ports actually
belong to several different physical ports of the onboard microcontroller. As a result,
port operations such as io.portset, io.portget, or io.portstate do not access port
pins in perfect unison. In port operations, writing or reading of some lines will
happen sooner than writing or reading of other lines. This "dissonance" is very small
and will not matter for most applications, but do keep in mind that it does exist.
Port mapping arrangement is different for different ports, so their performance varies
slightly as well. Ports P0 and P1 are about 10% slower than P2, P3, and P4. In most
cases this difference is negligible, especially considering that GPIO line and port
manipulation on the EM2001 is about 7 times faster compared to the EM1001.
