Themis RES-12XR3, Руководство по установке

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1—Overview and Specifications
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Themis Computer
1.7 Chipset Overview
Built upon the functionality and capability of the Intel 5520 platform, RES-12XR3
Configuration 7 provides the performance required for dual processor-based high-
end systems, including optimal configuration options for communications, high-end
CAD systems, or database applications. Configuration 7 supports up to two
quad/six-core 5600-series or two quad-core 5500-series intel 64-bit Xeon processors
with a QPI up to 6.4 GT/s. The Intel chipset consists of:
• the Intel 5520 (Tylersburg) chipset, and
• the ICH1 OR + IOH-36D
With the Intel QuickPath Interconnect (QPI) controller built in the processor, the
5500 Series Processor platform is the first dual-processing platform to offer the next-
generation point-to-point system interconnect interface, replacing current Front Side
Bus Technology and providing substantial system performance enhancement by uti-
lizing serial link interconnections, allowing for increased bandwidth and scalabil-
ity.The IOH connects to each processor through an independent QuickPath
Interconnect link. Each link consists of 20 pairs of unidirectional differential lanes
for transmission and receiving in addition to a differential forwarded clock. A full-
width QuickPath interconnect link pair provides 84 signals. Each processor supports
two QuickPath links, one going to the other processor and the other to the 5520 chip.
The 5520 chipset supports up to 36 PCI Express Gen2 lanes, peer-to-peer read and
write transactions. The ICH10R provides up to 6 PCI-Express ports, three SATA
ports and two USB connections. In addition, the Intel 5520 platform also offers a
wide range of RAS (Reliability, Availability and Serviceability) features. These fea-
tures include memory interface ECC, x4,/x8 Single Device Data Correction
(SDDC), Cyclic Redundancy Check (CRC), parity protection, out-of-band register
access via SMBus, memory mirroring, memory sparing, and Hot-plug support on the
PCI-Express Interface.
1.7.0.1 Main Features of the 5500 Series Processor and 5520 Chipset
• Four (5500) to six (5600) processor cores in each CPU with 8MB shared cache
among cores
• Two full-width Intel QuickPath interconnect links, up to 6.4 GT/s of data transfer
rate in each direction
• Virtualization Technology, Integrated Management Engine supported
• Point-to-point cache coherent interconnect, Fast/narrow unidirectional links, and
Concurrent bi-directional traffic
• Error detection via CRC and Error correction via Link level retry