207
8-22-3. Questionable Status Register
Description
The Questionable Status Registers will show if any faults or
errors have occurred.
Bit Summary
Register
Bit
Bit Weight
Voltage overload
0
1
Over temperature
4
16
Loop unlock
5
32
Ext Mod Overload
7
128
Cal Error
8
256
External Reference
9
512
8-22-4. Standard Event Status Registers
Description
The Standard Event Status Registers indicate when the *OPC
command has been executed or whether any programming
errors have occurred.
Notes
The Standard Event Status Enable register is cleared when
the *ESE 0 command is used.
The Standard Event Status Event register is cleared when the
*CLS command or the *ESR? command is used.
Bit Summary
Register
Bit
Bit Weight
Operation complete bit
0
1
Query Error
2
4
Device Error
3
8
Execution Error
4
16
Command Error
5
32
Power On
7
128
Error Bits
Operation
complete
The operation complete bit is set when all
selected pending operations are complete.
This bit is set in response to the *OPC
command.
Query Error
The Query Error bit is set when there is an
error reading the Output Queue. This can be
caused by trying to read the Output Queue
when there is no data present.
Device Error
The Device Dependent Error indicates a
failure of the self-test, calibration, memory or
other device dependent error.
Содержание FGX-2220
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