1
SLAU454A – July 2012 – Revised April 2016
Copyright © 2012–2016, Texas Instruments Incorporated
TSW4806EVM
Microsoft, Windows are registered trademarks of Microsoft Corporation.
User's Guide
SLAU454A – July 2012 – Revised April 2016
TSW4806EVM
The TSW4806 evaluation module (EVM), one of the new Texas Instruments (TI) low-cost evaluation tools,
uses an LMK04806 dual-PLL clock-jitter cleaner and generator, providing a low cost, low-noise, portable
clocking solution for use with TI's high-speed data converter EVMs. Together with the accompanying
Labview-based Graphical User Interface (GUI), it is a complete clocking tool used with the other low-cost
TI evaluation tools providing a complete system that captures and evaluates data samples from ADC
EVM’s and generates test patterns to DAC EVM’s. The EVM's on-board EEPROM comes with several
pre-programmed register settings so the board can begin running without using the GUI interface. The
EEPROM provides the memory necessary for saving up to eight custom LMK04806 configuration settings.
These settings are quickly loaded using on-board switches.
Contents
1
Introduction
...................................................................................................................
1.1
Overview
.............................................................................................................
2
Software Control
.............................................................................................................
2.1
Installation Instructions
.............................................................................................
2.2
Software Operation
.................................................................................................
3
TSW4806 GUI Operation
...................................................................................................
4
EEPROM
......................................................................................................................
5
Optional Features and Configurations
...................................................................................
5.1
Clocking
............................................................................................................
List of Figures
1
TSW4806EVM Block Diagram
.............................................................................................
2
LMK04800 Main Tab Window
.............................................................................................
3
LMK04800 Output Tab
......................................................................................................
4
LMK04800 Advanced Tab
..................................................................................................
5
PLL2 Settings
................................................................................................................
6
Clock Divider Settings
.......................................................................................................
7
EEPROM Programming Interface
.........................................................................................
List of Tables
1
Available LMK04800 Family Devices
....................................................................................
2
Main Window Description
...................................................................................................
3
LMK04800 Output Tab Description
........................................................................................
4
LMK04800 Advanced Tab Description
....................................................................................
1
Introduction
1.1
Overview
The EVM provides several programmable output clock sources. Four SMA outputs (J1, J4, J6 and J17)
are configured as CMOS outputs. Configure the two other output pairs (J2, J3) and (J7, J15) for CMOS,
LVDS, or LVPECL output levels.