Texas Instruments TPS65735EVM-703 Скачать руководство пользователя страница 6

Setup

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J13 : COMP, GND
J13 pin 1 is GND, pin 2 is the COMP pin of the TPS65735. COMP is the BAT voltage divided down
through an internal resistor divider where VCOMP = 0.5

×

VLDO + 300 mV. This is intended to be an

output to a low voltage microcontroller

J14 : HBL1, HBL2, HBR1, HBR2
J14 pin 1 is HBL1, pin 2 is HBL2, pin 3 is HBR1 and pin 4 is HBR2 of the TPS65735. These are the inputs
to the H-Bridge logic as noted in the datasheet.

4.2

Jumpers

JP1 : SW_SEL, S1, JP11
JP1 pin 1 is GND, pin 2 is the SW_SEL pin of the TPS65735 and pin 3 is the SYS voltage output of the
TPS65735. Short pins 1 and 2 to use a slide switch on SWICTH pin of TPS65735 or short pins 2 and 3 to
use the installed push-button switch S1 on SWITCH pin of TPS65735.

JP2 : VLDO_SET, 2.2V, 3.0V
JP2 pin 1 is GND, pin 2 is the VLDO_SET pin of the TPS65735 and pin 3 is the SYS voltage output of the
TPS65735. Short pins 1 and 2 to set the LDO output voltage to 2.2V or short pins 2 and 3 to set the LDO
output voltage to 3.0V.

JP3 : CHG_EN, ON, OFF
JP3 pin 1 is GND, pin 2 is the CHG_EN pin of the TPS65735 and pin 3 is VLDO of the TPS65735. Short
pins 1 and 2 to disable the charger or short pins 2 and 3 to enable the charger.

JP4 : SLEEP, HIGH, LOW
JP4 pin 1 is GND, pin 2 is the SLEEP pin of the TPS65735 and pin 3 is VLDO of the TPS65735. Short
pins 1 and 2 to put the TPS65735 in sleep mode or short pins 2 and 3 to disable sleep mode of the
TPS65735.

JP5 : BST_EN, ON, OFF
JP5 pin 1 is GND, pin 2 is the BST_EN pin of the TPS65735 and pin 3 is VLDO of the TPS65735. Short
pins 1 and 2 to disable the boost converter or short pins 2 and 3 to enable the boost converter.

4.3

Test Points

TP1 : When R5 is replaced with a 50-

Ω

resistor, TP1 is used to inject an AC signal which may be

measured at BST_OUT to verify frequency response and converter stability.

TP2 : When D2 is populated, TP2 can be used to connect a microcontroller GPIO to implement special
push-button power/on power off timing.

5

Setup

Set the first input power supply voltage to 5 V before connecting the EVM then power it off. Connect the
positive lead to J1, VIN. The power supply return lead is connected to J2 GND.

Set the second input power supply (capable of sinking capable of sinking at least 200 mA) to 3.6 V before
connecting to the EVM then power it off. The positive lead is connected to J3, BAT. The power supply
return lead is connected to J4, GND.

With JP3 shorting jumper connected between CHG_EN and OFF, JP4 shorting jumper connected
between SLEEP and OFF and JP5 shorting jumper connected between BST_EN and OFF apply 5V to the
VIN input.

With JP2-VLDO_SET set to 3.0V, verify with voltmeter that the VLDO output voltage is 3V

±

100 mV.

Position JP2 shorting jumper between VLDO_SET and 2.2V. Verify with voltmeter that the VLDO output
voltage is 2.2V

±

100m V.

Position JP5 shorting jumper between BST_EN and ON. Verify that input current is less than 50mA with
and input voltage of 5 V.

Verify JP1 is set with S1 and SWITCH shorted, press the push-button (S1) and verify with voltmeter that
the output voltage is 10V

±

1 V.

6

TPS65735 System Evaluation Board

SLVU418

June 2011

Submit Documentation Feedback

Copyright

©

2011, Texas Instruments Incorporated

Содержание TPS65735EVM-703

Страница 1: ...chematic 4 2 Boost Output Ripple Vbat 3 2 V and 1 mA Load on Boost 7 3 Startup Vin 5 V 1 mA Load on Boost and 15 mA Load on LDO 8 4 Shutdown Vin 5 V 1 mA Load on Boost and 15 mA Load on LDO 8 5 Startu...

Страница 2: ...formance Bottom Side 15 18 Top Assembly Silkscreen 16 19 Top Layer 16 20 Bottom Layer 17 List of Tables 1 Bill of Materials 18 2 Evaluation Materials 18 2 TPS65735 System Evaluation Board SLVU418 June...

Страница 3: ...1 3 Requirements In order to operate this EVM properly the hardware must be connected and properly configured All components and connectors are installed on the EVM as shipped except the dc power sup...

Страница 4: ...Schematic www ti com 3 Schematic Figure 1 Schematic 4 TPS65735 System Evaluation Board SLVU418 June 2011 Submit Documentation Feedback Copyright 2011 Texas Instruments Incorporated...

Страница 5: ...pin 3 is the SYS voltage output of the TPS65735 This header J11 is to simulate the use of a slide switch and should only be used when JP1 pins 1 and 2 are shorted If instead a push button switch is us...

Страница 6: ...and pin 3 is VLDO of the TPS65735 Short pins 1 and 2 to disable the boost converter or short pins 2 and 3 to enable the boost converter 4 3 Test Points TP1 When R5 is replaced with a 50 resistor TP1 i...

Страница 7: ...inking at least 500mA on BAT to 3 6 V and power on Verify that input current is less than 200mA with input voltage of 5 V VIN power supply Verify D1 lights up to indicate charging 6 TPS65735EVM Test D...

Страница 8: ...up Vin 5 V 1 mA Load on Boost and 15 mA Load on LDO Figure 4 Shutdown Vin 5 V 1 mA Load on Boost and 15 mA Load on LDO 8 TPS65735 System Evaluation Board SLVU418 June 2011 Submit Documentation Feedbac...

Страница 9: ...Vbat 3 6 V 1 mA Load on Boost and 15 mA Load on LDO Figure 6 Shutdown Vbat 3 6 V 1 mA Load on Boost and 15 mA Load on LDO 9 SLVU418 June 2011 TPS65735 System Evaluation Board Submit Documentation Feed...

Страница 10: ...om Figure 7 Switchnode Vbat 3 6 V No Load 0 5 s div Figure 8 Switchnode Vbat 3 6 V No Load 10 s div 10 TPS65735 System Evaluation Board SLVU418 June 2011 Submit Documentation Feedback Copyright 2011 T...

Страница 11: ...nt Constant 15 mA Load on LDO CH3 Bstout CH4 IBOOST Figure 10 Load Transient Boost Vbat 3 6 V with 5 mA to 0mA Transient Constant 15 mA Load on LDO CH3 Bstout CH4 IBOOST 11 SLVU418 June 2011 TPS65735...

Страница 12: ...6 V with 0 mA to 30 mA Transient CH3 VLDO CH4 IVLDO Figure 12 Load Transient LDO Vbat 3 6 V with 30 mA to 0 mA Transient CH3 VLDO CH4 IVLDO 12 TPS65735 System Evaluation Board SLVU418 June 2011 Submit...

Страница 13: ...3 Function Generator Input to HBR2 Ch 4 LCRN output Figure 14 H Bridge Operation Ch 1 Function Generator Input to HBL1 Ch 2 LCLP output Ch 3 Function Generator Input to HBL2 Ch 4 LCLN output 13 SLVU41...

Страница 14: ...Test Data www ti com 6 2 Measured Data Figure 15 Load Regulation 6 3 Thermal Performance Figure 16 and Figure 17 show the typical thermal performance for the TPS826xx for both the top side and the bo...

Страница 15: ...Top Side Figure 16 Thermal Performance Top Side 6 3 2 Bottom Side Figure 17 Thermal Performance Bottom Side 15 SLVU418 June 2011 TPS65735 System Evaluation Board Submit Documentation Feedback Copyrig...

Страница 16: ...t www ti com 7 EVM Assembly Drawings and Layout Figure 18 Top Assembly Silkscreen Figure 19 Top Layer 16 TPS65735 System Evaluation Board SLVU418 June 2011 Submit Documentation Feedback Copyright 2011...

Страница 17: ...www ti com EVM Assembly Drawings and Layout Figure 20 Bottom Layer 17 SLVU418 June 2011 TPS65735 System Evaluation Board Submit Documentation Feedback Copyright 2011 Texas Instruments Incorporated...

Страница 18: ...U for Active Shutter 3D Glasses QFN 32 TPS65735RSN TI Table 2 Evaluation Materials Count RefDes Value Description Size Part Number MFR 1 D1 LTST C190CKT Diode LED Red 2 1 V 20 mA 6 mcd 0603 LTST C190C...

Страница 19: ...duct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application enginee...

Страница 20: ...orized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parti...

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