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EVM Assembly Drawings and Layout Guidelines
4.2
Layout Guidelines
•
TPS2543 placement: Place the TPS2543 near the USB output connector and 150-
µ
F OUT pin filter
capacitor. Connect the exposed pad to the GND pin and the system ground plane using an array of
vias.
•
IN pin bypass capacitance: Place the 0.1-
µ
F bypass capacitor near the IN pin and make the
connection using a low-inductance trace.
•
DP-OUT/DM-OUT, DP-IN/DM-IN traces: Route these traces as controlled-impedance differential pairs
per the USB-2.0 specification. Minimize the use of vias in the high-speed data lines.
provides
a good signal-routing example for the high-speed data traces. In this example, the data pairs are
routed as edge-coupled microstrips with nominal differential impedance of 90
Ω
. The reference plane is
tied to GND and is shown in
. Ensure that the reference plane is void of cuts or splits above
the differential pairs to prevent impedance discontinuities.
9
SLVU660
–
February 2012
TPS2543EVM User
'
s Guide
Copyright
©
2012, Texas Instruments Incorporated