Texas Instruments TPS1HC30-Q1, Руководство пользователя

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2 BoosterPack
™
Operation
While the TPS1HC30EVM can be used as a standalone evaluation board without the need of any external
microcontroller, the EVM also comes populated with BoosterPack headers to enable easy interface with a Texas
Instruments microcontroller. The 40-pin headers of the BoosterPack headers are used, however all signals can
be accessed using headers J1 and J2 enabling use with the 20-pin header. Additionally, by populating the "LDO
to BP Power" jumper, the user has the ability to power the underlying LaunchPad
™ through the integrated 3.3-V
LDO on the TPS1HC30EVM. The following table contains a list of pins connected to the BoosterPack header.
Table 2-1. BoosterPack
™
Pin Assignment
BoosterPack Pin Function Note
J1-1 3.3-V power rail Disconnect "LDO to BP Power" if powering from USB.
J1-5 Open-drain FAULT pin from TPS1HC30-Q1
J13 controls whether the FAULT pin is pulled up from
the BoosterPack's 3.3-V rail or the 3.3-V onboard LDO
of the TPS1HC30EVM.
J1-6 Current sensing through the SNS pin
Resistor controlled either by digital potentiometer U3,
potentiometer labeled "SNS" or soldered down resistor
R12
J1-9
I2C SDA line for onboard TPL0102-100 digipot
(controlling the current limit)
Pulled up to BoosterPack's 3.3-V rail
J1-10
I2C SCL line for onboard TPL0102-100 digipot
(controlling the current limit)
Pulled up to BoosterPack's 3.3-V rail
J2-5 EN to enable VOUT Active high. Can be connected to PWM.
J2-6 LATCH pin of TPS1HC30-Q1
Controls latching behavior of the TPS1HC30-Q1. See
the device data sheet for details.
J2-7 DIAG_EN pin of TPS1HC30-Q1
Enables and disables diagnostics for the TPS1HC30-
Q1. See the device data sheet for details.
www.ti.com BoosterPack
™
Operation
SLVUCI3 – JUNE 2022
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