
Clock Stop Mode Timing Diagrams
SPI Operation Using the Clock Stop Mode
6-6
SPRU592E
6.4 Clock Stop Mode Timing Diagrams
The timing diagrams for the four possible clock stop mode configurations are
shown here. Notice that the frame-synchronization signal used in clock stop
mode is active throughout the entire transmission as a slave-enable signal.
Although the timing diagrams show 8-bit transfers, the packet length can be
set to 8, 12, 16, 20, 24, or 32 bits per packet. The receive packet length is
selected with the RWDLEN1 bits of RCR1, and the transmit packet length is
selected with the XWDLEN1 bits of XCR1. For clock stop mode, the values of
RWDLEN1 and XWDLEN1 must be the same because the McBSP transmit
and receive circuits are synchronized to a single clock.
Note:
Even if multiple words are consecutively transferred, the CLKX signal is
always stopped and the FSX signal returns to the inactive state after a packet
transfer. When consecutive packet transfers are performed, this leads to a
minimum idle time of two bit-periods between each packet transfer.
Figure 6
−
2. SPI Transfer With CLKSTP = 10b (no clock delay), CLKXP = 0, CLKRP = 0
Á
Á
Á
Á
Á
Á
Á
Á
B1
B2
B4
B3
B0
B5
B6
B7
B0
B1
B2
B3
B4
B5
B6
B7
FSX/SS
DX or DR/MOSI
(from master)
CLKX/SCK
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
DX or DR/MISO
(from slave)
Notes:
1) If the McBSP is the SPI master (CLKXM = 1), MOSI = DX. If the McBSP is the SPI slave (CLKXM = 0), MOSI = DR.
2) If the McBSP is the SPI master (CLKXM = 1), MISO = DR. If the McBSP is the SPI slave (CLKXM = 0), MISO = DX.
Figure 6
−
3. SPI Transfer With CLKSTP = 11b (clock delay), CLKXP = 0, CLKRP = 1
Á
Á
Á
Á
Á
Á
Á
Á
B1
B2
B4
B3
B0
B5
B6
B7
B0
B1
B2
B3
B4
B5
B6
B7
FSX/SS
DX or DR/MOSI
(from master)
CLKX/SCK
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
DX or DR/MISO
(from slave)
Notes:
1) If the McBSP is the SPI master (CLKXM = 1), MOSI = DX. If the McBSP is the SPI slave (CLKXM = 0), MOSI = DR.
2) If the McBSP is the SPI master (CLKXM = 1), MISO = DR. If the McBSP is the SPI slave (CLKXM = 0), MISO = DX.
Содержание TMS320VC5509
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