
Introduction
Introduction to the McBSP
1-2
SPRU592E
1.1 Introduction
The TMS320C55x DSPs provide multiple high-speed, multichannel buffered
serial ports (McBSPs) that allow direct interface to other C55x DSPs, codecs,
and other devices in a system. For the number of McBSPs available on a
particular C55x device, see the device-specific data manual.
1.2 Key Features of the McBSP
The McBSP provides:
-
Full-duplex communication
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Double-buffered transmission and triple-buffered reception, which allow
a continuous data stream
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Independent clocking and framing for reception and for transmission
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The capability to send interrupts to the CPU and to send DMA events to
the DMA controller
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128 channels for transmission and for reception
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Multichannel selection modes that enable you to allow or block transfers
in each of the channels
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Direct interface to industry-standard codecs, analog interface chips
(AICs), and other serially connected A/D and D/A devices
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Support for external generation of clock signals and
frame-synchronization (frame-sync) signals
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A programmable sample rate generator for internal generation and control
of clock signals and frame-sync signals
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Programmable polarity for frame-sync pulses and for clock signals
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Direct interface to:
J
T1/E1 framers
J
MVIP switching compatible and ST-BUS compliant devices including:
H
MVIP framers
H
H.100 framers
H
SCSA framers
J
IOM-2 compliant devices
J
AC97 compliant devices (The necessary multiphase frame capability
is provided.)
J
IIS compliant devices
J
SPI devices
Introduction / Key Features of the McBSP
Содержание TMS320VC5509
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