Texas Instruments TMS320C54x, Руководство пользователя

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The MEMORY Directive
7-27 Linker Description
7.7 The MEMORY Directive
The linker determines where output sections should be allocated in memory;
it must have a model of target memory to accomplish this task. The MEMORY
directive allows you to specify a model of target memory so that you can define
the types of memory your system contains and the address ranges they
occupy. The linker maintains the model as it allocates output sections and uses
it to determine which memory locations can be used for object code.
The memory configurations of TMS320C54x systems differ from application
to application. The MEMORY directive allows you to specify a variety of
configurations. After you use MEMORY to define a memory model, you can
use the SECTIONS directive to allocate output sections into defined memory.
Refer to Section 2.4, How the Linker Handles Sections, on page 2-12 for
details on how the linker handles sections. Refer to Section 2.5, Relocation,
on page 2-15 for information on the relocation of sections.
7.7.1 Default Memory Model
The assembler enables you to assemble code for the TMS320C54x device.
The assembler inserts a field in the output file’s header, identifying the device.
The linker reads this information from the object file’s header. If you do not use
the MEMORY directive, the linker uses a default memory model specific to the
named device. For more information about the default memory model, see
subsection 7.12.1,
Allocation Algorithm, on page 7-53.
7.7.2 MEMORY Directive Syntax
The MEMORY directive identifies ranges of memory that are physically
present in the target system and can be used by a program. Each memory
range has a
name, a starting address, and a length.
’C54x devices have separate memory spaces that occupy the same address
ranges. In the default model, one space is dedicated to program areas, while
a second is dedicated to data (the number of separate address spaces
depends on the customized configuration of your chip. See the
TMS320C54x
DSP Reference Set for more information).
The linker allows you to configure these address spaces separately by using
the MEMORY directive’s PAGE option. In the default model, PAGE 0 refers to
program memory, and PAGE 1 refers to data memory. The linker treats these
two pages as completely separate memory spaces. The ’C54x supports as
many as 255 PAGES, but the number available to you depends on the
configuration you have chosen.