Hardware, Software, Testing Requirements, and Test Results
30
TIDUES1A – October 2019 – Revised February 2020
Copyright © 2019–2020, Texas Instruments Incorporated
EMC Compliant 10/100-Mbps Ethernet PHY Reference Design With IEEE
802.3at Type-1 (
≤
12.95 W) PoE-PD
Table 11. Eye Diagram Measurement Results
PARAMETER
SPECIFICATION RANGE
MEASURED VALUE
Positive Amplitude (+Vout)
950 mV to 1050 mV
1037.7 mV
Negative Amplitude (–Vout)
–950 mV to –1050 mV
–1027.8 mV
Rise time (+ve)
3 ns to 5 ns
3.64 ns
Rise time (–ve)
3 ns to 5 ns
3.55 ns
Fall time (+ve)
3 ns to 5 ns
3.72 ns
Fall time (–ve)
3 ns to 5 ns
3.55 ns
Jitter (+ve)
< 1.4 ns
420 ps
Jitter (–ve)
< 1.4 ns
430 ps
3.2.2.2
Bit Error Rate (BER)
Bit Error Rate verification was performed as per Fast Ethernet Consortium Physical Medium Dependent
(PMD) Clause 25 Test Suite #25.2.4. This test attempts to verify a much lower BER in the presence of
poor signal-to-noise ratio. As per PMD Test Suite #25.2.4, the bit error rate is verified for cable lengths of
75 and 100 m. However, in this reference design, the BER test was performed with 150-m cable length for
data only and with 100-m cable length for power plus data together.
BER Test Criterion:
If more than 7 errors are observed in 3 × 10
11
bits (about 19,770,000 packets each
with 1,518-byte - approximately 20 million packets), it can be concluded that the error rate is greater than
10
–11
with less than a 5% chance of error. Note that if no errors are observed, it can be concluded that the
BER is no more than 10
–11
with less than a 5% chance of error.
Test Procedure #1: 150-m Cable Length for Data Only
•
Configure the IXIA link simulator to generate more than 20 million packets with random data
•
Use 150-m long CAT5e Ethernet cable
•
Generated packets are sent to the repeater board (PSE side board) powered by a 12-V DC adaptor to
pass through the packets
•
Only data, no power: Disable PoE-PSE by shorting pin-1 and 2 of J10 connector on PSE side board
•
Connect PD side board on the other end of the cable powered by a separate 12-V DC adaptor locally
•
Configure the DP83825 Ethernet PHY on the PD side board to loopback the received packets
internally
•
Loopback packets are finally received by IXIA via repeater board and gets compared with the originally
transmitted packet for any error
Observation:
No errors are observed over multiple iterations as
shows. That concludes the
BER is no more than 10
–11
with less than a 5% chance of error.
Test Procedure #2: 100-m Cable Length for Power plus Data
•
Configure the IXIA link simulator to generate more than 20 million packets with random data
•
Use 100-m long CAT5e Ethernet cable
•
Generated packets are sent to repeater board (PSE side board) powered by a 12-V DC adaptor to
pass through the packets
•
Power plus data together: Enable PoE-PSE to inject power over Ethernet cable by removing the
shorting between pin 1 and 2 of J10 connector on PSE side board
•
Connect the PD side board on the other end of the cable that gets powered from PoE
•
Configure the DP83825 Ethernet PHY on the PD side board to loopback the received packets
internally
•
Loopback packets are finally received by IXIA via repeater board and gets compared with the originally
transmitted packet for any error
