Bus 1
Bus 2
µP
SN65HVD257
RXD2
TDX
FL
T2
SN65HVD257
FL
T1
S1
S2
FL
T3
RXD1
RXD
1A
2A
µP
SN65HVD257
RXD2
TDX
FL
T2
SN65HVD257
FL
T1
S1
S2
FL
T3
RXD1
RXD
1n
2n
µP
SN65HVD257
RXD2
TDX
FL
T2
SN65HVD257
FL
T1
S1
S2
FL
T3
RXD1
RXD
1n
2n
µP
SN65HVD257
RXD2
TDX
FL
T2
SN65HVD257
FL
T1
S1
S2
FL
T3
RXD1
RXD
1Z
2Z
µP
SN65HVD257
RXD2
TDX
FL
T2
SN65HVD257
FL
T1
S1
S2
FL
T3
Bus 1
Bus 2
RXD1
RXD
Introduction
the t
RXD_DTO
time. The remaining branch of the network continues to function. The FAULT pin of the
transceivers on the branch with the fault shows this via the FAULT output to their host processors, which
will diagnose the failure condition. The S-pin (silent mode pin) may be used to put a branch in silent mode
to check each branch for other faults, including to look for bus open (recessive) faults. For automatic
detection of a branch being open (recessive), an XOR gate may be used to combine the RXD outputs of
both branches. During dominant bits (low), were the branches do not match the XOR, the circuit outputs a
logic high. A small RC filter on the output eliminates false outputs due to small timing differences in the
branches and transceivers. This XOR and the FAULT outputs of the transceivers could be connected to
edge triggered interrupt pins on the host microprocessor to enter specialize software routines if there is an
issue on the redundant network.
Thus it is possible build up a robust and redundant CAN network topology in a very simple and low cost
manner. These concepts can be expanded into other more complicated and flexible CAN network
topologies to solve various other system-level challenges with a networked infrastructure.
Figure 2. Typical SN65HVD257 Node To Build A Redundant Physical Layer Topology
Figure 3. Typical Redundant Physical Layer Topology Using SN65HVD257
3
SLLU172 – August 2012
SN65HVD257 CAN EVM: Functional Safety and Redundant CAN Network
Copyright © 2012, Texas Instruments Incorporated
