Texas Instruments OMAP36 Series, Техническое справочное руководство

Страница: 987 / 3738

Public Version
www.ti.com
IVA2.2 Subsystem Register Manual
Table 5-495. WUGEN_MEVT0
Address Offset 0x060
Physical address 0x01C2 1060 Instance IVA2.2 WUGEN
Description This register contains the interrupt mask (LSB)
Type R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MIRQ9 MIRQ8 MIRQ7 MIRQ6 MIRQ5 MIRQ4 MIRQ3 MIRQ2 MIRQ1 MIRQ0
MIRQ31 MIRQ30 MIRQ29 MIRQ28 MIRQ27 MIRQ26 MIRQ25 MIRQ24 MIRQ23 MIRQ22 MIRQ21 MIRQ20 MIRQ19 MIRQ18 MIRQ17 MIRQ16 MIRQ15 MIRQ14 MIRQ13 MIRQ12 MIRQ11 MIRQ10
Bits Field Name Description Type Reset
31 MIRQ31 Interrupt Mask bit #31 R 1
30 MIRQ30 Interrupt Mask bit #30 R 1
29 MIRQ29 Interrupt Mask bit #29 R 1
28 MIRQ28 Interrupt Mask bit #28 R 1
27 MIRQ27 Interrupt Mask bit #27 R 1
26 MIRQ26 Interrupt Mask bit #26 R 1
25 MIRQ25 Interrupt Mask bit #25 R 1
24 MIRQ24 Interrupt Mask bit #24 R 1
23 MIRQ23 Interrupt Mask bit #23 R 1
22 MIRQ22 Interrupt Mask bit #22 R 1
21 MIRQ21 Interrupt Mask bit #21 R 1
20 MIRQ20 Interrupt Mask bit #20 R 1
19 MIRQ19 Interrupt Mask bit #19 R 1
18 MIRQ18 Interrupt Mask bit #18 R 1
17 MIRQ17 Interrupt Mask bit #17 R 1
16 MIRQ16 Interrupt Mask bit #16 R 1
15 MIRQ15 Interrupt Mask bit #15 R 1
14 MIRQ14 Interrupt Mask bit #14 R 1
13 MIRQ13 Interrupt Mask bit #13 R 1
12 MIRQ12 Interrupt Mask bit #12 R 1
11 MIRQ11 Interrupt Mask bit #11 R 1
10 MIRQ10 Interrupt Mask bit #10 R 1
9 MIRQ9 Interrupt Mask bit #9 R 1
8 MIRQ8 Interrupt Mask bit #8 R 1
7 MIRQ7 Interrupt Mask bit #7 R 1
6 MIRQ6 Interrupt Mask bit #6 R 1
5 MIRQ5 Interrupt Mask bit #5 R 1
4 MIRQ4 Interrupt Mask bit #4 R 1
3 MIRQ3 Interrupt Mask bit #3 R 1
2 MIRQ2 Interrupt Mask bit #2 R 1
1 MIRQ1 Interrupt Mask bit #1 R 1
0 MIRQ0 Interrupt Mask bit #0 R 1
987 SWPU177N – December 2009 – Revised November 2010 IVA2.2 Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated