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Public Version
PRCM Register Manual
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Table 3-325. Register Call Summary for Register RM_RSTST_MPU
PRCM Basic Programming Model
•
RM_RSTST_ <domain_name> (Reset Status Register)
:
PRCM Register Manual
•
MPU_PRM Registers Register Summary
Table 3-326. PM_WKDEP_MPU
Address Offset
0x0000 00C8
Physical Address
0x4830 69C8
Instance
MPU_PRM
Description
This register allows enabling or disabling the wake-up of the MPU domain upon another domain wakeup
events.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
EN_PER
EN_DSS
EN_IVA2
EN_CORE
RESERVED
RESERVED
RESERVED
Bits
Field Name
Description
Type
Reset
31:8
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x000000
7
EN_PER
PER domain dependency
RW
0x1
0x0: MPU domain is independent of PER domain
wake-up event.
0x1: MPU domain is woken-up upon PER domain
wake-up event.
6
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x0
5
EN_DSS
DSS domain dependency
RW
0x1
0x0: MPU domain is independent of DSS domain
wake-up event.
0x1: MPU domain is woken-up upon DSS domain
wake-up event.
4:3
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x0
2
EN_IVA2
IVA2 domain dependency
RW
0x1
0x0: MPU domain is independent of IVA2 domain
wake-up event.
0x1: MPU domain is woken-up upon IVA2 domain
wake-up event.
1
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x0
0
EN_CORE
CORE domain dependency
RW
0x1
0x0: MPU domain is independent of CORE domain
wake-up event.
0x1: MPU domain is is woken-up upon CORE domain
wake-up event.
Table 3-327. Register Call Summary for Register PM_WKDEP_MPU
PRCM Functional Description
•
:
•
PRCM Basic Programming Model
•
CM_CLKSTCTRL_ <domain_name> (Clock State Control Register)
•
PM_WKDEP_ <domain_name> (Wake-Up Dependency Register)
:
570 Power, Reset, and Clock Management
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
Содержание OMAP36 Series
Страница 174: ...174 List of Tables SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 692: ...692 MPU Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 1084: ...1084 IVA2 2 Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 1990: ...1990 2D 3D Graphics Accelerator SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2334: ...2334 Memory Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2700: ...2700 Memory Management Units SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2868: ...2868 HDQ 1 Wire SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2974: ...2974 UART IrDA CIR SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3054: ...3054 Multichannel SPI SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3462: ...3462 MMC SD SDIO Card Interface SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3508: ...3508 General Purpose Interface SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3584: ...3584 Initialization SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3648: ...3648 Debug and Emulation SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...