Texas Instruments OMAP36 Series, Техническое справочное руководство

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PRCM Functional Description
3.5.7 PRCM Off-Mode Management
3.5.7.1 Overview
The CORE power domain can be switched from ON to OFF or retention state.
When the CORE power domain is inactive, the clock manager does not generate an interface clock, and
device interconnects are inactive; therefore, the device is effectively in off mode. In retention state,
however, the logic in the CORE domain is retained, and the device wake-up latency is small compared to
the latency when the CORE power domain is in off state. In waking from the CORE domain off state, the
CORE logic configuration must be loaded from a scratchpad memory in the WKUP power domain.
NOTE: Although some modules in the device can be kept active while the CORE power domain is
off or in retention, this is not recommended.
When the device is put in off mode (the CORE power domain is in retention or off state), the device
voltage domains can be switched off to minimize leakage currents. However, reactivity to wake-up events
must be ensured.
The device supports a unique off-mode management scheme that allows deactivation of all modules,
isolation of their outputs, and configuration of a dedicated off mode on the I/O pads of the device, to listen
to wake-up events. A wake-up event on any I/O pad is detected by the PRM (in WKUP always-on power
domain), which can then wake up the device.
3.5.7.2 Device Off-Mode Configuration
3.5.7.2.1 Overview
Any I/O pad of the device can be configured to generate a wake-up event when the device is in off mode.
The off-mode scheme is based on the following components of the device:
• I/O pads
• SCM
Figure 3-86 is an overview of the I/O pad off-mode scheme. In this mode, the I/O pads of the device form
a daisy chain. The I/O pad logic at the two ends of the chain is connected to the PRM.
When a wake-up event (WUEVT) occurs on an enabled I/O pad in the chain, the event is propagated
through the chain to the PRM. Multiple I/O pads can receive a wake-up event simultaneously; however,
the PRM receives only the OR output for all the enabled I/O pads. When the device wakes up, the MPU
can determine all sources of the current wake-up event logged into the corresponding
CONTROL.CONTROL_PADCONF_<IOpad>[15] WAKEUPEVENT0 or
CONTROL.CONTROL_PADCONF_<IOpad>[31] WAKEUPEVENT1 bit in the SCM.
The I/O pad wake-up scheme must be enabled globally by setting the PRCM. PM_WKEN_WKUP [8]
EN_IO bit and the PRCM. PM_WKEN_WKUP [16] EN_IO_CHAIN bit. The wake-up event from each I/O
pad of the device can be individually enabled/disabled (EVT_EN signal) by writing to the
CONTROL.CONTROL_PADCONF_<IOpad>[14] WAKEUPENABLE0 or
CONTROL.CONTROL_PADCONF_<IOpad>[30] WAKEUPENABLE1 bit in the SCM.
For information about the SCM, see Chapter 13 , System Control Module.
NOTE: As explained previously (see Section 3.5.4 , Idle and Wake-Up Management),
module-specific wake-up events other than the I/O pad wake-up scheme can wake up the
device from off mode. For example, the GPIO pads in the WKUP power domain can also
wake up the device.
NOTE: For the wake-up features of the GPIO pads , see Chapter 25 , General-Purpose Interface.
391 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
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