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UART/IrDA/CIR
accessible only on alternate pins through muxing capabilities.
–
UART3 peripheral booting is not supported.
•
UART4 is not functional.
lists UART modules signals. Highlighted signals are not mapped on any pin in OMAP36xx in
CYN package devices.
Table A-25. UART I/O Description
Signal
I/O
(1)
Description
Reset
uart1_rx
I
Serial data input
HiZ
uart1_tx
O
Serial data output
1
uart1_cts
I
Clear to send
HiZ
uart1_rts
O
Request to send
1
uart2_rx
I
Serial data input
HiZ
uart2_tx
O
Serial data output
1
uart2_cts
I
Clear to send
HiZ
uart2_rts
O
Request to send
1
uart3_rx_irrx
I
Serial data input, IR and Remote RX
HiZ
uart3_tx_irtx
O
Serial data output, IR TX
1
uart3_cts_rctx
I/O
Clear-To-Send (input), Remote TX (output)
1
uart3_rts_sd
O
Request-To-Send, IR enable
1
uart4_rx
I
Serial data input
HiZ
uart4_tx
O
Serial data output
1
(1)
I = Input, O = Output
lists the base address and address space for the UART/IrDA/CIR module instances in the
OMAP36xx in CYN package devices.
NOTE:
Modules, highlighted in orange in
has removed functionality in the OMAP36xx in
CYN package devices. The module is still present on the die; therefore, its mappings are
provided to control its activity and for debug purposes.
Table A-26. UART/IrDA/CIR Instance Summary
Module Name
Base Address
Size
UART1
(1)
0x4806 A000
4KB
UART2
(1)
0x4806 C000
4KB
UART3
(2)
0x4902 0000
4KB
UART4
(1)
0x4904 2000
4KB
(1)
UART only
(2)
UART, IrDA, and CIR
A.13.1 UART/IrDA/CIR Use Guidelines
For the unsupported UART4 module, next guidelines must be followed:
•
Keep SYSC_REG[4:3] IDLEMODE = 0x0.
•
Keep SYSC_REG[2] ENWAKEUP = 0x0.
•
Set SYSC_REG[0] AUTOIDLE = 0x1.
•
Keep all interrupts masked.
For available pins for use with UART2 and UART3, see
, System Control Module.
3691
SWPU177N – December 2009 – Revised November 2010
OMAP36xx Multimedia Device in CYN Package
Copyright © 2009–2010, Texas Instruments Incorporated
Содержание OMAP36 Series
Страница 174: ...174 List of Tables SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 692: ...692 MPU Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 1084: ...1084 IVA2 2 Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 1990: ...1990 2D 3D Graphics Accelerator SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2334: ...2334 Memory Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2700: ...2700 Memory Management Units SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2868: ...2868 HDQ 1 Wire SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2974: ...2974 UART IrDA CIR SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3054: ...3054 Multichannel SPI SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3462: ...3462 MMC SD SDIO Card Interface SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3508: ...3508 General Purpose Interface SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3584: ...3584 Initialization SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3648: ...3648 Debug and Emulation SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...