Texas Instruments OMAP36 Series, Техническое справочное руководство

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IV
A
2
p
o
w
e
r
d
o
m
a
in
D
P
L
L
1
p
o
w
e
r
d
o
m
a
in
D
P
L
L
1
_
A
L
W
O
N
_
F
C
L
K
D
P
L
L
2
p
o
w
e
r
d
o
m
a
in
D
P
L
L
3
p
o
w
e
r
d
o
m
a
in
D
P
L
L
4
p
o
w
e
r
d
o
m
a
in
D
P
L
L
1
_
F
C
L
K
IV
A
2
.2
M
P
U
D
P
L
L
2
_
A
L
W
O
N
_
F
C
L
K
D
P
L
L
4
_
A
L
W
O
N
_
F
C
L
K
D
P
L
L
3
_
A
L
W
O
N
_
F
C
L
K
D
P
L
L
2
_
F
C
L
K
DPLL1_M2_CLK
DPLL2_M2_CLK
DPLL3_M2X2_CLK
DPLL3_M2_CLK
DPLL3_M3X2_CLK
96M_ALWON_FCLK
DPLL4_M2X2_CLK
DPLL4_M3X2_CLK
DPLL4_M4X2_CLK
DPLL4_M5X2_CLK
DPLL4_M6X2_CLK
P
R
M
C
M
M
P
U
p
o
w
e
r
d
o
m
a
in
W
K
U
P
p
o
w
e
r
d
o
m
a
in
C
O
R
E
p
o
w
e
r
d
o
m
a
in
DPLL1 (MPU)
DPLL2 (IV
A2)
DPLL3 (CORE)
DPLL4 (PER)
D
P
L
L
5
p
o
w
e
r
d
o
m
a
in
DPLL5 (PER2)
D
P
L
L
5
_
A
L
W
O
N
_
F
C
L
K
DPLL5_M2X2_CLK
prcm-054
Public Version
PRCM Functional Description
www.ti.com
Figure 3-58. DPLL Clock Signals
322 Power, Reset, and Clock Management SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated