Texas Instruments OMAP36 Series, Техническое справочное руководство

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SDMA Basic Programming Model
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In the RAM to RAM copy example, to copy in loop it's possible to link channel 10 on itself. The following
line can be added in the channel configuration :
/* g) Set link for loop */ DMA4_CLINK_CTRL_CH10 = 0x0000800A;
11.5.7 90° Clockwise Image Rotation
The 90° clockwise image rotation example described in Section 11.4.3 , Addressing Modes, can be
programmed as follows:
1. Configure the transfer parameters in the logical DMA channel registers:
• DMA4_CSDPi :
– Transfer ES = 32-bit (32 bpp), DMA register bits DMA4_CSDPi [1:0]
– Read and write port access types = maximum burst size supported by memory device, DMA
register bits
DMA4_CSDPi [8:7] and DMA4_CSDPi [15:14]
– Source and destination endianism, DMA register bits DMA4_CSDPi [21] and DMA4_CSDPi [19]
– Write mode = posted with last element nonposted, DMA register bits DMA4_CSDPi [17:16]
– Source and destination packed = Yes (although destination writes will not benefit because
EI>1), DMA register bits
DMA4_CSDPi [6] and DMA4_CSDPi [13]
• DMA4_CENi : EN = 240
• DMA4_CFNi : FN per transfer block = 160
• DMA4_CSSAi : Source start address = 0x100000
• DMA4_CDSAi : destination start address = 0x20013E
• DMA4_CCRi :
– Read and write port addressing modes = double-index addressing mode for both or
post-increment addressing on source and double-index addressing on destination, DMA
register bits
DMA4_CCRi [13:12] and DMA4_CCRi [15:14]
– Low or high priority, DMA register bit DMA4_CCRi [6]
– DMA request number = 0 (for software-triggered transfer), DMA register bits DMA4_CCRi [4:0]
and DMA4_CCRi [20:19]
• DMA4_CSEi: Source EI = 1
• DMA4_CSFi: Source frame index = 1
• DMA4_CDEi: destination EI = 637
• DMA4_CDFi: destination frame index = –152967
2. Start the transfer via the enable bit in the channel DMA4_CCRi register.
Below are the parameters to perform this rotation from 0x80C00000 RAM address to 0x80F00000, with
the same code as in
Section 11.5.2 :
/* Init. parameters */ DMA4->DataType = 0x2; // DMA4_CSDPi[1:0] DMA4->ReadPortAccessType = 0x3;
// DMA4_CSDPi[8:7] DMA4->WritePortAccessType = 0x3; // DMA4_CSDPi[15:14] DMA4->SourceEndiansim =
0; // DMA4_CSDPi[21] DMA4->DestinationEndianism = 0; // DMA4_CSDPi[19] DMA4->WriteMode = 0x2; //
DMA4_CSDPi[17:16] DMA4->SourcePacked = 0x1; // DMA4_CSDPi[6] DMA4->DestinationPacked = 0x1; //
DMA4_CSDPi[13] DMA4->NumberOfElementPerFrame = 240; // DMA4_CENi DMA4-
>NumberOfFramePerTransferBlock = 160; // DMA4_CFNi DMA4->SourceStartAddress = 0x80C00000; //
DMA4_CSSAi DMA4->DestinationStartAddress = 0x80F00000; // DMA4_CDSAi DMA4->SourceElementIndex =
1; // DMA4_CSEi DMA4->SourceFrameIndex = 1; // DMA4_CSFi DMA4->DestinationElementIndex = 637; //
DMA4_CDEi DMA4->DestinationFrameIndex = -152967; // DMA4_CDFi DMA4->ReadPortAccessMode = 0x3; //
DMA4_CCRi[13:12] DMA4->WritePortAccessMode = 0x3; // DMA4_CCRi[15:14] DMA4->ReadPriority = 0; //
DMA4_CCRi[6] DMA4->WritePriority = 0; // DMA4_CCRi[23] DMA4->ReadRequestNumber = 0; //
DMA4_CCRi[4:0] DMA4->WriteRequestNumber = 0; // DMA4_CCRi[20:19]
11.5.8 Graphic Operations
• Transparent copy:
– 1. Set the DMA4_CCRi [17] Transparent_Copy_Enable bit field to 1.
– 2. Set the DMA4_CCRi [16] Constant_Fill_Enable bit field to 0.
– 3. Set the value of key the color in the DMA4_COLORi [15:0] color_key bit field.
To perform this graphic operation, the following lines can be added to the example of Section 11.5.2
DMA4_CCR_CH10 &= ~(0x1 << 16); DMA4_CCR_CH10 |= 0x1 << 17; DMA4_COLOR_CH10 = 0x00000003;
• Solid Color fill:
2372 SDMA SWPU177N – December 2009 – Revised November 2010
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