Texas Instruments OMAP36 Series, Техническое справочное руководство

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General-Purpose Memory Controller
Bits Field Name Description Type Reset
1 SOFTRESET Software reset. RW 0x0
Set this bit to 1 triggers a module reset. This bit is automatically
reset by hardware. During reads, it always returns 0.
0x0: Normal mode
0x1: The module is reset
0 AUTOIDLE Internal Interface clock gating strategy RW 0x0
0x0: Interface clock is free-running
0x1: Automatic Interface clock gating strategy is applied, based on
the Interconnect activity
Table 10-32. Register Call Summary for Register GPMC_SYSCONFIG
General-Purpose Memory Controller
• Clocking, Reset, and Power Management Scheme : [0] [1] [2]
• GPMC Register Summary : [3]
Table 10-33. GPMC_SYSSTATUS
Address Offset 0x0000 0014
Physical Address 0x6E00 0014 Instance GPMC
Description This register provides status information about the module, excluding the interrupt status information
Type R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED RESERVED
RESETDONE
Bits Field Name Description Type Reset
31:8 RESERVED Reads returns 0 R 0x000000
7:1 RESERVED Reads returns 0 (reserved for Interconnect-socket status information) R 0x00
0 RESETDONE Internal reset monitoring R 0x-
0x0: Internal module reset in ongoing
0x1: Reset completed
Table 10-34. Register Call Summary for Register GPMC_SYSSTATUS
General-Purpose Memory Controller
• Clocking, Reset, and Power Management Scheme : [0]
• GPMC Register Summary : [1]
2197 SWPU177N – December 2009 – Revised November 2010 Memory Subsystem
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