Texas Instruments OMAP36 Series, Техническое справочное руководство

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L3 Interconnect
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Table 9-101. Register Call Summary for Register L3_SI_FLAG_STATUS_0
L3 Interconnect
• Global Error Reporting : [0]
• Error Analysis : [1]
• Time-Out Handling : [2] [3] [4]
• Acknowledging Errors : [5]
• Sideband Interconnect (SI) : [6]
Table 9-102. L3_SI_FLAG_STATUS_1
Address Offset 0x130
Physical Address 0x6800 0530 Instance SI
Description They are used to observe the individual bits that make up a composite interconnect flag.
Type R
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
STATUS
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
STATUS
Bits Field Name Description Type Reset
63:0 STATUS Status of sideband signals making up composite interconnect flag for R 0x0000000000000000
debug. See Table 9-30 .
Table 9-103. Register Call Summary for Register L3_SI_FLAG_STATUS_1
L3 Interconnect
• Global Error Reporting : [0]
• Error Analysis : [1]
• Acknowledging Errors : [2]
• Sideband Interconnect (SI) : [3]
2054 Interconnect SWPU177N – December 2009 – Revised November 2010
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