Texas Instruments OMAP36 Series, Техническое справочное руководство

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L3 Interconnect
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Table 9-38. L3_IA_COMPONENT
Address Offset 0x000
Physical Address See Table 9-34 to Table 9-37
Description Component register of IA
Type RW
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
Reserved
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CODE REV
Bits Field Name Description Type Reset
63:32 Reserved Reserved R 0x00000000
31:16 CODE Component code R See
(1)
.
15:0 REV Revision of the component R See
(1)
.
(1)
TI internal data
Table 9-39. Register Call Summary for Register L3_IA_COMPONENT
L3 Interconnect
• L3 Initiator Agent (L3 IA) : [0] [1] [2] [3]
Table 9-40. L3_IA_CORE
Address Offset 0x018
Physical Address See Table 9-34 to Table 9-37
Description Core register of L3 IA block
Type R
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
Reserved VENDOR_CODE
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CORE_CODE REV_CODE
Bits Field Name Description Type Reset
63:48 Reserved Reserved R 0x0000
47:32 VENDOR_CODE Vendor code R See
(1)
.
31:16 CORE_CODE Core code R See
(1)
.
15:0 REV_CODE Revision code R See
(1)
.
(1)
TI internal data
Table 9-41. Register Call Summary for Register L3_IA_CORE
L3 Interconnect
• L3 Initiator Agent (L3 IA) : [0] [1] [2] [3]
Table 9-42. L3_IA_AGENT_CONTROL
Address Offset 0x020
Physical Address See Table 9-34 to Table 9-37
Description Agent control register of IA block
2030 Interconnect SWPU177N – December 2009 – Revised November 2010
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