eUSCI_B I2C Registers
856
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Enhanced Universal Serial Communication Interface (eUSCI) – I
2
C Mode
32.4.15 UCBxIE Register
eUSCI_Bx I2C Interrupt Enable Register
Figure 32-31. UCBxIE Register
15
14
13
12
11
10
9
8
Reserved
UCBIT9IE
UCTXIE3
UCRXIE3
UCTXIE2
UCRXIE2
UCTXIE1
UCRXIE1
r0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
7
6
5
4
3
2
1
0
UCCLTOIE
UCBCNTIE
UCNACKIE
UCALIE
UCSTPIE
UCSTTIE
UCTXIE0
UCRXIE0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
rw-0
Table 32-18. UCBxIE Register Description
Bit
Field
Type
Reset
Description
15
Reserved
R
0h
Reserved
14
UCBIT9IE
RW
0h
Bit position 9 interrupt enable
0b = Interrupt disabled
1b = Interrupt enabled
13
UCTXIE3
RW
0h
Transmit interrupt enable 3
0b = Interrupt disabled
1b = Interrupt enabled
12
UCRXIE3
RW
0h
Receive interrupt enable 3
0b = Interrupt disabled
1b = Interrupt enabled
11
UCTXIE2
RW
0h
Transmit interrupt enable 2
0b = Interrupt disabled
1b = Interrupt enabled
10
UCRXIE2
RW
0h
Receive interrupt enable 2
0b = Interrupt disabled
1b = Interrupt enabled
9
UCTXIE1
RW
0h
Transmit interrupt enable 1
0b = Interrupt disabled
1b = Interrupt enabled
8
UCRXIE1
RW
0h
Receive interrupt enable 1
0b = Interrupt disabled
1b = Interrupt enabled
7
UCCLTOIE
RW
0h
Clock low time-out interrupt enable.
0b = Interrupt disabled
1b = Interrupt enabled
6
UCBCNTIE
RW
0h
Byte counter interrupt enable.
0b = Interrupt disabled
1b = Interrupt enabled
5
UCNACKIE
RW
0h
Not-acknowledge interrupt enable
0b = Interrupt disabled
1b = Interrupt enabled
4
UCALIE
RW
0h
Arbitration lost interrupt enable
0b = Interrupt disabled
1b = Interrupt enabled
3
UCSTPIE
RW
0h
STOP condition interrupt enable
0b = Interrupt disabled
1b = Interrupt enabled