SYS Registers
82
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
System Resets, Interrupts, and Operating Modes, System Control Module
(SYS)
1.16.9 SYSRSTIV Register
Reset Interrupt Vector Register
(1)
Reset value depends on reset source.
Figure 1-18. SYSRSTIV Register
15
14
13
12
11
10
9
8
SYSRSTIV
r0
r0
r0
r0
r0
r0
r0
r0
7
6
5
4
3
2
1
0
SYSRSTIV
r0
r0
r
(1)
r
(1)
r
(1)
r
(1)
r
(1)
r0
(1)
Reset value depends on reset source.
Table 1-25. SYSRSTIV Register Description
Bit
Field
Type
Reset
Description
15-0
SYSRSTIV
R
02h-
03Eh
(1)
Reset interrupt vector. Generates a value that can be used as address offset for
fast interrupt service routine handling to identify the last cause of a reset (BOR,
POR, PUC) . Writing to this register clears all pending reset source flags.
See the device-specific data sheet for a list of values.