Texas Instruments MSP-FET430, Руководство пользователя

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Frequently Asked Questions
A-2
A.1 Hardware
1) The state of the device (CPU registers, RAM memory, etc.) is
undefined following a reset. Exceptions to the above statement are
that the PC is loaded with the word at 0xfffe (i.e., the reset vector), the
status register is cleared, and the peripheral registers (SFRs) are
initialized as documented in the device Family User’s Guides. C-SPY
resets the device after programming it.
2) When the MSP-FET430X110 is used as an interface to an MSP430 on
the user’s circuit (i.e., there is no MSP430 device in the FET socket),
the XOUT and XIN signals from the FET should not be connected
to the corresponding pins of the in-circuit MSP430. Similarly, when
using the Interface module, do not connect the XOUT and XIN signals
from the Interface module to the corresponding pins of the in-circuit
MSP430.
3) The 14-conductor cable connecting the FET Interface module and the
Target Socket module must not exceed 8 inches (20 centimeters) in
length.
4) The signal assignment on the 14-conductor cable is identical for the
parallel port interface and the USB FET.
5) To utilize the on-chip ADC voltage references, C6 (10uF, 6.3V, low
leakage) must be installed on the Target Socket module.
6) Crystals/resonators Q1 and Q2 (if applicable) are not provided on
the Target Socket module. For MSP430 devices which contain user
selectable loading capacitors, the effective capacitance is the selected
capacitance plus 3pF (pad capacitance) divided by two.
7) Crystals/resonators have no effect upon the operation of the tool
and C-SPY (as any required clocking/timing is derived from the internal
DCO/FLL).
8) On 20-pin and 28-pin devices with multiplexed port/JTAG pins (P1.4-
P1.7), it is required that “RELEASE JTAG ON GO” be selected in
order to use these pins in their port capacity. Refer to C.1.1
EMULATOR->RELEASE JTAG ON GO for additional information
regarding this mechanism.
9) As an alternative to sharing the JTAG and port pins (on 20 and 28
pin devices), consider using an MSP430 device that is a “superset”
of the smaller device. A very powerful feature of the MSP430 is that
the family members are code and architecturally compatible, so code
developed on one device (say, without shared JTAG and port pins) will
port effortlessly to another (assuming an equivalent set of peripherals).
10) Information Memory may not be blank (erased to 0xff) when the
device is delivered from TI. Customers should erase the Information
Memory before its first usage. Main Memory of packaged devices is
blank when the device is delivered from TI.
11) The device current increases by approximately 10uA when a
device in low power mode is stopped (using ESC), and then the