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SNVU382A – April 2014 – Revised June 2014
Copyright © 2014, Texas Instruments Incorporated
Power Sequences
Chapter 6
SNVU382A – April 2014 – Revised June 2014
Power Sequences
The LP8860-Q1 has a dual function VDDIO/EN pin. It acts as enable for the chip as well as
supply/reference voltage for IO logic. Device starts when VDD voltage is present and above the
VDD_UVLO voltage level and the VDDIO/EN voltage is set above threshold voltage (1.2 V).
6.1
Start-up Sequence
The backlight is started either by setting PWM input high or by writing not zero brightness value to
registers, depending on the brightness control mode and phase shift configuration. See the
for details.
6.2
Shutdown Sequence
The backlight is shut down either with setting PWM input low or by writing zero brightness value to
registers, depending on the brightness control mode and phase shift configuration. See the
for details.