Texas Instruments LMK00308EVM, Руководство пользователя

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March 2012
LMK00308EVM User’s Guide
7
in the output phase noise floor at low offset frequencies as well as low-level spurs. The high PSRR of the
device helps to minimize supply-induced jitter.
6. Clock Inputs
The SMA inputs labeled CLKin0 & CLKin0* and CLKin1 & CLKin1* can be configured to receive a differential
clock or single-ended clock. Best performance is achieved with a differential input clock, which is the default
configuration for both CLKin ports.
Both CLKin0 and CLKin1 paths include footprint options to provide the user with flexibility in configuring the
termination, biasing, and coupling for the device inputs.
6.1. Configuring for a Single Ended Input
To configure an AC-coupled or DC-coupled single-ended clock input on CLKin0, follow the steps below.
CLKin1 can be modified similarly.
1. Remove R24 (100 ohm differential termination).
2. Terminate CLKin0 (driven input) by installing 51 ohms on R30.
3. Install 0.1 uF on C10 as a bypass capacitor.
4. Modify for AC or DC coupled input:
a. AC-coupled input:
i. Install 0 ohms on R23, so CLKin0* input pin is AC coupled to ground via C17.
b. DC-coupled input:
i. Replace R22 and R28 with 0 ohms to DC couple the input path.
ii. Bias CLKin0*(non-driven input) with a reference voltage near the common-mode voltage of
the DC-coupled input signal (on CLKin0) using R21 and R23 to form a voltage divider from
VCC.
For example, if CLKin0 will be driven by a single-ended, DC-coupled LVCMOS signal with a common-mode
voltage of 1.65 V, then 1 kohm resistors can be installed on R21 and R23 to bias CLKin0* to VCC/2.
7. Crystal Oscillator Interface
The LMK00308 has an integrated crystal oscillator interface (OSCin/OSCout) that supports a fundamental
mode, AT-cut crystal. If the crystal input is selected, the onboard XTAL on either footprint Y1 or Y2 will start-
up and the oscillator clock can be measured on any enabled output.
By default, a 25.000 MHz XTAL is populated on Y1, which uses a HC49 footprint on the bottom side of the
PCB. Alternatively, a 3.2 x 2.5 mm XTAL or 3.3 V XO (3.3 V CMOS or clipped sinewave) can be populated
on Y2, located on the top side. Only one XTAL footprint should be used at a time.
When using a XTAL, the external load capacitor values of C18 and C22 (C
EXT
) depend on the specified load
capacitance (C
L
) for the crystal, as well as the device’s OSCin input capacitance (C
IN
= 1 pF typical) and the
PCB stray capacitance (C
STRAY
~ 1 pF). The selected 25 MHz crystal is specified for C
L
of 18 pF. Assuming
equal external load capacitor values for optimum symmetry, C
EXT
can be calculated as follows:
C
EXT
= (C
L
– C
IN
– C
STRAY
) * 2
C
EXT
= (18 pF
– 1 pF – 1 pF) * 2
C
EXT
~ 33 pF (nearest standard value)
To limit crystal power dissipation, a 1 kohm resistor is placed between the OSCout pin and the crystal.
7.1. Configuring OSCin for a Single Ended Input
To configure a single-ended clock input on OSCin, remove R34 and R37 to disconnect the crystal. Install 0.1
uF on C24 to provide an AC-coupled path from the SMA input labeled OSCin to the device input, which has
internal biasing. Note that the OSCin path includes a 51-ohm termination on R42.