VDC
PGND
VSW
Q1 Gate
Q2 Gate
FAULT
LMG3410
IN
FAULT
Startup
Logic
LMG3410
IN
FAULT
Startup
Logic
Copyright © 2016, Texas Instruments Incorporated
Description
5
SNOU140A – April 2016 – Revised May 2017
Copyright © 2016–2017, Texas Instruments Incorporated
Using the LMG3410-HB-EVM Half-Bridge and LMG34XX-BB-EVM Breakout
Board EVM
Figure 1. Simplified LMG3410-HB-EVM Schematic
CAUTION
High-voltage levels are present on the evaluation module whenever it is
energized. Proper precautions must be taken when working with the EVM.
1.1.1
FAULT
The FAULT pin of LMG3410-HB-EVM is active low when an under voltage lockout on an auxiliary voltage
rail, over temperature or overcurrent even occurs on the LMG3410. The FAULT signal for both LMG3410
devices are level shifted to AGND, where they are logic AND connected to the FAULT pin.
CAUTION
Please do NOT ignore FAULT signal when using LMG3410-HB-EVM. Turn off
both top and bottom devices, if any device is generating FAULT signal. The
device under fault condition may operate in undesired 3rd-quadrant mode and
may be over heated and damaged due to the high source-drain voltage drop if
the other device is still switching.
1.1.2
Power Pins
While there are some power stage bypass capacitors on the LMG3410-HB-EVM from VDC to PGND to
minimize voltage overshoot during switching, more bulk capacitance is required to hold up the DC voltage
during operation. It is highly recommended to minimize, and ideally prevent, any overlap and parasitic
capacitance from VSW to VDC, PGND and any logic pins. The two grounds PGND and AGND are
functionally isolated from each other on the LMG3410-HB-EVM.