2
SNVU518 – April 2016
Copyright © 2016, Texas Instruments Incorporated
Table of Contents
Contents
1
High Density EVM Description
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1.1
Additional Features
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2
EVM Photos
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3
Signal Connections and Test Point Descriptions
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3.1
Test Point Descriptions
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3.2
Optional Configurations
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3.3
Signal Connections
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3.3.1
Input Voltage Monitoring
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3.3.2
Output Voltage Monitoring
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3.3.3
Power Good Voltage Output
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3.3.4
Enable Voltage Input
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3.3.5
SYNC Input
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4
Test Setup and Procedure
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4.1
Test Equipment
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4.2
Recommended Test Setup
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4.2.1
Input Connections
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4.2.2
Output Connections
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4.3
Test Procedure
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4.3.1
Line, Load Regulation and Efficiency
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4.3.2
Control Loop Gain and Phase
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5
Test Data and Performance Curves
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5.1
Efficiency
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5.2
Line and Load Regulation
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5.3
Bode Plots
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5.4
Operating Waveforms
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5.4.1
Switch Node Voltages and Inductor Current
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5.4.2
Output Voltage Ripple, 20-MHz Bandwidth
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5.4.3
Startup Waveform
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6
EVM Documentation
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6.1
Schematic
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6.2
PCB Layout
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6.3
Bill of Materials
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Revision History
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