Texas Instruments LM5170-Q1 EVM, Руководство пользователя

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Setup
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10 SNVU543A – November 2016 – Revised December 2016
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LM5170-Q1 EVM User Guide
(1)
J18 is the interface connector to the slave EVM in the multiphase configuration if the host EVM serves as the master. All control
commands and control signals are sent through J18 to the slave EVM’s J17.
(2)
I = input pin
(3)
O = output pin
Table 5. J18 60-Pin Header Description
(1)
PIN SIGNAL I/O DESCRIPTION
1 V48_X — No Connect
3 V12_X — No Connect
5 ENABLE_S I
(2)
Slave EVM enable (connect to the UVLO pin of the slave IC)
7 CH1_S I Slave EVM CH-1 control (connect to the EN1 pin of the IC)
9 DIR I Direction command
11 ISETA I Channel current setting (analog voltage)
13 ISETD I Channel current setting (PWM signal)
15 SYNCIN_S I The external clock input for the slave
17 SYNCOUT_S O
(3)
Slave EVM clock output signal
19 OPT I Interleave angle setting
21 CH2_S I Slave EVM CH-2 control (connect to the EN1 pin of the IC)
23 +3.3 V I Output of o3.3-V voltage
25 +5 V I Output of o5-V voltage
27 IOUT1_S O Slave EVM CH-1 monitor in 3 or 4 phases
29 IOUT2_S O Slave EVM CH-2 current monitor in 3 or 4 phases
31 IOUT1_X — Not used
33 IOUT2_X — Not used
35 AGND I/O Reference GND for control signals
37 PGND O Power ground of the DC-DC converter
39 DT_S I Slave EVM dead time adjustment pin
41 DT_X — No Connect
43 +10 V I Input of +10-V bias supply, or output of o10-V bias supply
45 nFAULT_X I/O Slave EVM fault report flag, or external shutdown command pin
47 UVLO_X — No Connect
49 CH1_X — No Connect
51 CH2_X — No Connect
53 SYNCIN_X — No Connect
55 SYNCOUT_X — No Connect
57 nFAULT_X — No Connect
59 KEY — No Connect
All even
number pins
AGND I/O All signals’ return