FPC401 EVM GUI Description and Setup
13
SNLU222B – December 2016 – Revised September 2019
Copyright © 2016–2019, Texas Instruments Incorporated
FPC401 and FPC402 Evaluation Module (EVM) User’s Guide
2.8
Prefetch Configuration
To configure prefetching, select the
Prefetch Settings
tab. The PREFETCH GLOBAL SETTINGS
determines the port number, device I2C address (0xA0 or 0xA2), prefetch length, and starting register
offset address for both the periodic prefetch and interrupt-driven prefetch features. The
Prefetch Length
input controls the number of bytes to be prefetched and the
Prefetch Offset (Hex)
input determines the
starting register offset address.
In the
PERIODIC PREFETCH SETTINGS
section, enter the prefetch period in milliseconds and click
START PREFETCH
. A period of 0 ms is a one-time prefetch. To stop the periodic prefetch, click the
STOP PREFETCH
button. This will not clear the gate bit, so any downstream read in the prefetched range
will read from the FPC memory. To reset the gate bit and force the FPC to read from the downstream
port, click
RESET GATE
. See the data sheet and programmer's guide for more details about prefetching.
In the
INTERRUPT DRIVEN PREFETCH
section, select the input that will trigger the interrupt-driven
prefetch, the edge transition of the selected input, and click
SET
. After an interrupt-driven prefetch is
successful, to clear the gate bit and perform another one, click the
RE-ARM
button. This will also clear the
interrupt.
Figure 15. FPC401 GUI – Prefetch Settings
