Texas Instruments FlatLink SN75LVDS83B Скачать руководство пользователя страница 19

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VCC

JMP4

Header 7x2

1
3
5
7
9

2
4
6
8
10

JMP2

Header 7x2

1
3
5
7
9

2
4
6
8
10

JMP7

1
2

JMP3

Header 7x2

1
3
5
7
9

2
4
6
8
10

U1E

SN75LVDS83B

CLKSEL

/SHTDN

R1
4.7k

R2
4.7k

JMP5

1
2

JMP8

1
2

JMP1

Header 7x2

1
3
5
7
9

2
4
6
8
10

U1B

SN75LVDS83B

D12

D13

D14

D15

D18

D19

D20

D21

D22

D24

D25

D26

D27

D10

D11

D16

D17

D23

CLKIN

VCC = 3.3 V
Clock Edge Select
Jumper high for rising edge
Jumper low for falling edge

Jumper high to enable device
Jumper low to disable device

www.ti.com

LVDS83BTSSOPEVM Schematics

SNLU233 – October 2017

Submit Documentation Feedback

LVDS83BTSSOPEVM User’s Guide

Figure 17. LVDS83BTSSOPEVM Schematics (2/3)

Содержание FlatLink SN75LVDS83B

Страница 1: ... voltage differential signaling LVDS line drivers These functions allow 28 bits of single ended LVTTL data to be synchronously transmitted over five balanced pair conductors for receipt by a compatible receiver such as the SN75LVDS82 and LCD panels with integrated LVDS receivers This evaluation module EVM acts as a reference design that can be easily modified for any projected application Target a...

Страница 2: ...n Clear Jumper Setting 4 5 24 Bit Color Host to 24 Bit LCD Panel Application With 2 MSB Transfer Over Fourth Data Channel 6 6 24 Bit Color Host to 24 Bit LCD Panel Application With 2 LBS Transfer Over Fourth Data Channel 7 7 18 Bit Color Host to 18 Bit LCD Panel Application 8 8 12 Bit Color Host to 18 Bit LCD Panel Application 9 9 24 Bit Color Host to 18 Bit LCD Panel Application 10 10 LVDS83BTSSO...

Страница 3: ...tems LVDS83BTSSOPEVM board LVDS83BTSSOPEVM User s Guide 2 2 Description of EVM Board The LVDS83BTSSOPEVM is designed to provide straightforward evaluation of the SN75LVDS83B device using four 7 bit parallel load serial out shift registers Power to the board is provided through banana jacks P4 for VCC and P1 for VCCIO For correct board operation power must be fixed at VCC 3 3 V and the I O power VC...

Страница 4: ...s powered up while all other devices blocks are still powered down Additionally it is also permitted to power up all 3 3 V power domains while IOVCC is still powered down to GND The device will not suffer damage However in this case all the I Os are detected as logic HIGH regardless of the input voltage level Therefore connecting Shutdown Clear to GND will still be interpreted as logic HIGH conseq...

Страница 5: ...ut The outputs are available at J1 to J10 for direct connection to oscilloscope inputs Matched length cables must be used when connecting the EVM to a scope to avoid inducing skew between the noninverting and inverting outputs Power jacks P1 to P4 are used to provide power ground and signal ground reference for the EVM The power connections to the EVM determine the common mode load to the device b...

Страница 6: ...ses rising edge triggered clocking If rising edge triggered clocking is desired place jumper to create LOW level input at JMP7 100 To Column Driver Panel Connector Main Board Connector 100 100 100 100 To Row Driver 24 bpc GPU R0 LSB R1 R2 R3 R4 R5 R6 R7 MSB G0 LSB G1 G2 G3 G4 G5 G6 G7 MSB HSYNC VSYNC ENABLE RSVD CLK B0 LSB B1 B2 B3 B4 B5 B6 B7 MSB C1 C3 C4 C5 C10 C9 C8 C7 C6 C11 C12 C13 C14 C15 C2...

Страница 7: ...Main Board Connector 100 100 100 100 To Row Driver 24 bpc GPU R0 LSB R1 R2 R3 R4 R5 R6 R7 MSB G0 LSB G1 G2 G3 G4 G5 G6 G7 MSB HSYNC VSYNC ENABLE RSVD CLK B0 LSB B1 B2 B3 B4 B5 B6 B7 MSB CLKIN D19 D20 D21 D22 D24 D25 D26 D8 D9 D12 D13 D14 D15 D18 JMP4 JMP3 JMP2 JMP1 D0 D1 D2 D3 D4 D6 D7 D27 D5 D10 D11 D16 D17 D23 SIGNAL_GND SIGNAL_GND SIGNAL_GND SIGNAL_GND C1 C3 C4 C5 C10 C9 C8 C7 C6 C11 C12 C13 C1...

Страница 8: ...ctor Main Board Connector 100 100 100 18 bpc GPU R0 LSB R1 R2 R3 R4 R5 MSB G0 LSB G1 G2 G3 G4 G5 MSB HSYNC VSYNC ENABLE RSVD CLK B0 LSB B1 B2 B3 B4 B5 MSB 24bpp LCD Display FPC Cable To Column Driver To Row Driver CLKIN D19 D20 D21 D22 D24 D25 D26 D8 D9 D12 D13 D14 D15 D18 JMP4 JMP3 JMP2 JMP1 D0 D1 D2 D3 D4 D6 D7 D27 D5 D10 D11 D16 D17 D23 SIGNAL_GND SIGNAL_GND SIGNAL_GND SIGNAL_GND C1 C3 C4 C5 C1...

Страница 9: ...2 may be connected to the LSB of each color increased dynamics range of entire color space at the expense of non linear step sizes between each step For linear steps with less dynamic range connect D0 D7 and D15 to VCC 100 Panel Connector Main Board Connector 100 100 100 12 bpc GPU R2 or Vcc R3 or GND R0 LSB R1 R2 R3 MSB G2 or Vcc G3 or GND G0 LSB G1 G2 G3 MSB HSYNC VSYNC ENABLE RSVD CLK B2 or Vcc...

Страница 10: ...m 10 SNLU233 October 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM User s Guide Figure 9 24 Bit Color Host to 18 Bit LCD Panel Application 3 PCB Construction This section discusses the construction of the LVDS83BTSSOPEVM boards The section includes the board layers to show how the board was built 3 1 LVDS83BTSSOPEVM Board Layout This EVM was desig...

Страница 11: ...www ti com PCB Construction 11 SNLU233 October 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM User s Guide Figure 10 LVDS83BTSSOPEVM Top Layer ...

Страница 12: ...PCB Construction www ti com 12 SNLU233 October 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM User s Guide Figure 11 LVDS83BTSSOPEVM Layer 2 GND ...

Страница 13: ...www ti com PCB Construction 13 SNLU233 October 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM User s Guide Figure 12 LVDS83BTSSOPEVM Layer 3 DUT GND ...

Страница 14: ...PCB Construction www ti com 14 SNLU233 October 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM User s Guide Figure 13 LVDS83BTSSOPEVM Layer 4 VCC ...

Страница 15: ...www ti com PCB Construction 15 SNLU233 October 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM User s Guide Figure 14 LVDS83BTSSOPEVM Layer 5 GND ...

Страница 16: ...PCB Construction www ti com 16 SNLU233 October 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM User s Guide Figure 15 LVDS83BTSSOPEVM Bottom Layer ...

Страница 17: ...8PACTU CC7343 10 µF 10 10 V ceramic capacitor X5R 0805 2012 metric 8 3 68 µF LESR C1 C6 C11 TDK C3216X5R0J686M160AB CC7343 68 µF 20 6 3 V ceramic capacitor X5R 1206 3216 metric 9 2 0 0 Ω R3 R4 Panasonic Ecg ERJ 3GEY0R00V R0603 0 0 Ω jumper 0 1 W 1 10W chip resistor 0603 1608 metric automotive AEC Q200 thick film 10 2 4 75 KΩ R2 R1 Yageo RC0603FR 074K75L R0603 4 75 kΩ 1 0 1 W 1 10W chip resistor 06...

Страница 18: ...ck 1 C26 1uF P4 Banana jack 1 P2 Banana Jack 1 C27 1uF C2 10uF C5 01uF C1 68uF C19 01uF R4 0 Copyright 2017 Texas Instruments Incorporated VCC and Bulk Bypass Capacitors Signal Ground and Bulk Bypass Capacitor Device Ground VCCIO and Bulk Bypass Capacitors Short to JMP9 to short VCC 3 3 V GND_SIGNAL to GND_POWER LVDS83BTSSOPEVM Schematics www ti com 18 SNLU233 October 2017 Submit Documentation Fee...

Страница 19: ... 3 D7 4 D12 11 D13 12 D14 14 D15 15 D18 19 D19 20 D20 22 D21 23 D22 24 D24 27 D25 28 D26 30 D27 50 D5 2 D10 8 D11 10 D16 16 D17 18 D23 25 CLKIN 31 Copyright 2017 Texas Instruments Incorporated VCC 3 3 V Clock Edge Select Jumper high for rising edge Jumper low for falling edge Jumper high to enable device Jumper low to disable device www ti com LVDS83BTSSOPEVM Schematics 19 SNLU233 October 2017 Sub...

Страница 20: ...FACE J7 sma_surface SM A SURFACE J8 sma_surface SM A SURFACE J6 sma_surface U1A SN75LVDS83B Y0M 48 Y0P 47 Y2P 41 42 Y2M Y1P 45 Y3M 38 Y3P 37 CLKOUTM 40 CLKOUTP 39 Y1M 46 Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM Schematics www ti com 20 SNLU233 October 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated LVDS83BTSSOPEVM User s Guide Figure 18 LVDS83B...

Страница 21: ...y set forth above or credit User s account for such EVM TI s liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warr...

Страница 22: ...the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la réglementation d Industrie Canada le présent émetteur radio peut fo...

Страница 23: ...ed loads Any loads applied outside of the specified output range may also result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Please consult the EVM user guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even ...

Страница 24: ...COST OF REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN TWELVE 12 MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS OCCURRED 8 2 Specif...

Страница 25: ... TI Resource NO OTHER LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN including but not limited to any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI product...

Страница 26: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments LVDS83BTSSOPEVM ...

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