Texas Instruments DS320PR810-RSC-EVM Скачать руководство пользователя страница 11

2.10 Quick-Start Guide (Pin Mode)

Check that the shunts are at the following positions as shown in 

Figure 1-1

:

1. The redrivers are configured to operate in Pin Mode (MODE pins tied to L0 using J1 header).
2. RX_Detect state machine of all redrivers is enabled by leaving J2 open.
3. The redrivers are enabled (PWDN pins tied to GND using J4 header). Alternatively, for PCIe applications,

the PWDN pins may be driven by PCIe Present (PRSNT) signal by leaving J4 open and placing a shunt
across pins 1 and 2 of J6.

4. The board is configured for any PCIe bus width (PRSNT signal controls set as shown in 

Figure 1-1

 using J7,

J8, J9 and J10 headers).

5. DC Gain of all redrivers is set to 0 dB by leaving J14 open for the downstream redrivers and by leaving J21

open for the upstream redrivers.

6. EQ level of the RX CTLEs of all redrivers is set to 10 dB at 16 GHz by using J15 and J16 for the downstream

redrivers and J22 and J23 for the upstream redrivers.

7. If necessary, adjust EQ levels of the downstream redrivers, or upstream redrivers, or both, by arranging

shunts on J15 and J16 for downstream redrivers and J22 and J23 for the upstream redrivers.

8. Plug the EVM into a PCIe x16 server motherboard slot. Ensure the motherboard is powered down before

installing the EVM or configured for hot-plug operation.

9. Install a compatible PCIe endpoint card into the straddle connector of the EVM.
10. Power-up the motherboard.

2.11 Quick-Start Guide (SMBus Slave Mode)

1. Configure all devices to operate in the SMBus Slave Mode by setting their MODE pins to the L2 level. This is

accomplished by placing a shunt on J1 L2 location.

2. Set a unique SMBus Slave address for each device by placing shunts in the following arrangement:

• On J15 connector, place shunts in L0 locations for all downstream devices (DS1_0 and DS2_0; DS1_1

and DS2_1 are a Don't Care).

• On J16 connector, place shunts in L0 locations for the DS1_0 and in L1 locations for DS2_0 (DS1_1 and

DS2_1 are a Don't Care).

• On J22 connector, place shunts in L0 locations for all upstream devices (US1_0 and US2_0; DS1_1 and

DS2_1 are a Don't Care).

• On J23 connector, place a shunt in L2 location for the US1_0 and remove shunts for US2_0 to achieve

L3 level (US1_1 and US2_1 are a Don't Care).

3. Move shunts from pins 1-2 to pins 2-3 on J17, J18, J19, J20, J24, J25, J26, and J27 to connect the dual

function redriver pins to the SMBus, I2C bus.

4. Enable all devices by pulling their PWDN pins to GND. This is accomplished by placing a shunt on J4

between PWDN and GND.

5. Connect the 

USB2ANY

 Adapter to J3 (Note that the USB2ANY Adapter is not supplied with the

DS320PR810-RSC-EVM).

6. Install 

SigCon Architect

 Version 3.0.0.15 application and the DS320PR810 profile.

7. Plug the EVM into a PCIe x16 server motherboard slot. Ensure the motherboard is powered down before

installing the EVM or configured for hot-plug operation.

8. Install a compatible PCIe endpoint card into the straddle connector of the EVM.
9. Power-up the motherboard.
10. Start the SigCon Architect application.
11. Select the DS320PR810 Configuration Page and click 

Apply

 box to enable the device profile. If necessary,

edit devices addresses in the Edit Device Addresses box.

12. In the DS320PR810 High Level Page, select Block Diagram as shown in 

Figure 2-1

.

13. Select the desired EQ Settings and Driver VOD.
14. Select devices you want to apply the selected settings and click 

Apply to All Channels

.

www.ti.com

Description

SNLU297 – MAY 2021

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DS320PR810-RSC-EVM User's Guide

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Copyright © 2021 Texas Instruments Incorporated

Содержание DS320PR810-RSC-EVM

Страница 1: ...lization Control 6 2 5 DS320PR810 RX Detect State Machine 7 2 6 DS320PR810 DC Gain Control 7 2 7 DS320PR810 EVM Global Controls 8 2 8 DS320PR810EVM Downstream Devices Control 9 2 9 DS320PR810EVM Upstr...

Страница 2: ...2 Modes of Operation 4 Table 2 3 DS320PR810 SMBus Address Map 5 Table 2 4 Equalization Control Settings 6 Table 2 5 Four Level Control Pin Settings 7 Table 2 6 GAIN Control 7 Table 2 7 EVM Global Cont...

Страница 3: ...at rates up to 32 Gbps Linear equalization for seamless support of link training and PCIe channel extension CTLE boosts up to 24 dB at 16 GHz Programmable device configuration through GPIO or I2C SMBu...

Страница 4: ...k to GND L2 24 9 k to GND L3 75 k to GND L4 Float 2 2 DS320PR810 Modes of Operation Each DS320PR810 can be configured to operate in either Pin Mode SMBus with I2C Slave Mode or SMBus with I2C Master...

Страница 5: ...resistor straps on the EQ0_0 ADDR1 and EQ1_0 ADDR0 pins as shown in Table 2 3 When multiple DS320PR810 devices are on the same SMBus interface bus each channel bank of each device must be configured...

Страница 6: ...VEL CTLE BOOST AT 8 GHz dB CTLE BOOST AT 16 GHz dB 0 L0 L0 0 0 1 L0 L1 1 2 2 0 2 L0 L2 2 4 4 0 3 L0 L3 3 6 6 0 4 L0 L4 4 8 8 0 5 L1 L0 5 6 10 0 6 L1 L1 6 2 11 0 7 L1 L2 6 9 12 0 8 L1 L3 7 5 13 0 9 L1...

Страница 7: ...e Detect Hi Z Post Detect 50 Pre Detect Hi Z Post Detect 50 Outputs poll until 2 consecutive valid detections L L L3 N A N A Reserved L L L4 Float Pre Detect Hi Z Post Detect 50 Pre Detect Hi Z Post D...

Страница 8: ...bled PWDN floating Tie PCIe system PRSNT signal to PWDN using J6 for the PWDN control optional for PCIe use case J5 3x1 Header Access point to the WP write protect pin of the onboard EEPROM devices WP...

Страница 9: ...9 16 for configuring EQ0_1 pin of Bank 1 of DS1 device Use pins 17 24 for configuring EQ0_0 pin of Bank 0 of DS2 device Use pins 25 32 for configuring EQ0_1 pin of Bank 1 of DS2 device SMBus I2C Mode...

Страница 10: ...figuring EQ0_1 pin of Bank 1 of US1 device Use pins 17 24 for configuring EQ0_0 pin of Bank 0 of US2 device Use pins 25 32 for configuring EQ0_1 pin of Bank 1 of US2 device SMBus I2C Modes ADDR0 contr...

Страница 11: ...placing shunts in the following arrangement On J15 connector place shunts in L0 locations for all downstream devices DS1_0 and DS2_0 DS1_1 and DS2_1 are a Don t Care On J16 connector place shunts in L...

Страница 12: ...Figure 2 1 SigCon Architect DS320PR810 High Level Page Description www ti com 12 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Страница 13: ...Redriver EVM 10 WHQGHU DUG Server Motherboard PCIe Gen 4 CPU 8 WHQGHU DUG 6 WHQGHU DUG Figure 3 1 Example Test Setup Figure 3 2 is a typical test result achieved with a system shown in Figure 3 1 As...

Страница 14: ...ough Figure 4 8 illustrate the EVM schematics Figure 4 1 Top Level Schematic Page Schematics www ti com 14 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texa...

Страница 15: ...Figure 4 2 Control and Status Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 15 Copyright 2021 Texas Instruments Incorporated...

Страница 16: ...Figure 4 3 Voltage Regulator Schematic Page Schematics www ti com 16 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Страница 17: ...Figure 4 4 Gold Finger Connector Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 17 Copyright 2021 Texas Instruments Incorporated...

Страница 18: ...Figure 4 5 Downstream Devices Schematic Page Schematics www ti com 18 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Страница 19: ...Figure 4 6 Upstream Devices Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 19 Copyright 2021 Texas Instruments Incorporated...

Страница 20: ...Figure 4 7 Straddle Connector Schematic Page Schematics www ti com 20 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Страница 21: ...Figure 4 8 Hardware Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 21 Copyright 2021 Texas Instruments Incorporated...

Страница 22: ...ure 5 2 illustrate the EVM board layouts Figure 5 1 Top Layer Figure 5 2 Bottom Layer Board Layout www ti com 22 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 202...

Страница 23: ...47 uF 6 3 V 10 X7R 0603 0603 C0603C474K9RACTU Kemet C17 1 0 1uF CAP CERM 0 1 uF 10 V 10 X7R 0603 0603 C0603C104K8RACTU Kemet C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36...

Страница 24: ...0402 ERJ 2RKF2490X Panasonic R6 R9 R26 3 2 05k RES 2 05 k 1 0 063 W AEC Q200 Grade 0 0402 402 CRCW04022K05FKED Vishay Dale R7 R10 2 6 19k RES 6 19 k 1 0 063 W AEC Q200 Grade 0 0402 402 CRCW04026K19FK...

Страница 25: ...0 063 W AEC Q200 Grade 0 0402 0402 CRCW040275K0FKED Vishay Dale R118 1 100 RES 100 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW0402100RFKED Vishay Dale SH J1 SH J2 SH J3 SH J4 SH J5 SH J6 SH J7 SH J8 SH...

Страница 26: ...press 4 0 Linear Redriver data sheet 2 Texas Instruments DS320PR810 Programming Guide 3 Texas Instruments CEMsSLIMSAS EVM Evaluation Module user s guide References www ti com 26 DS320PR810 RSC EVM Use...

Страница 27: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 28: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 29: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 30: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 31: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 32: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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