Texas Instruments DP838367 RGMII EVM, Руководство по началу работы, Страница: 1 / 8

Getting Started Guide
SNLU189 – October 2015
DP838367 RGMII EVM
ABSTRACT
This document is a getting started reference guide for the DP83867 RGMII EVM. This will help the user to
get familiar with the EVM and quickly get it in the desired mode of operation.
1 Introduction
The DP83867ERGZ RGMII EVM (DP83867ERGZ-R-EVM) supports 1000/100/10 Mb/s and is compliant
with the IEEE 802.3 standard. This reference design supports RGMII interfaces.
The DP83867 EVM includes three onboard status LEDs, 5-V connectors with onboard LDO, and is JTAG
accessible. The DP83867 EVM is capable of providing a 125-MHz reference clock from an onboard 25-
MHz crystal. Serial management interface, MDIO/MDC, is supported and can be used to access PHY
registers for additional features. There are 4-level straps, which allow for system configurations without the
need to directly access PHY registers. External power supplies can be connected to each specified
voltage rail for additional system evaluation. The DP83867 EVM supports Wake-on-LAN, Start-of-Frame
Detect IEEE 1588 Time Stamp, and configurable I/O voltages.
Figure 1 illustrates the EVM components.
1 SNLU189 – October 2015 DP838367 RGMII EVM
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