Pop R131, no pop R129, R130 for HPD on
No pop R131, pop R129, R130 for HPD snoop only
VDD_1P1V
VCC_3P3V
VCC_3P3V
VDD_1P1V
BOARD_5V
OUT_CLKP
PAGE4
OUT_CLKN
PAGE4
OUT_D2P
PAGE4
OUT_D2N
PAGE4
OUT_D1P
PAGE4
OUT_D1N
PAGE4
OUT_D0P
PAGE4
OUT_D0N
PAGE4
HPD_SNK
PAGE4
SDA_SNK
PAGE4
SCL_SNK
PAGE4
SLEW_CTL
PAGE5
OE
PAGE6
AUX_SRCN/ARC_OUT
PAGE2
AUX_SRCP/SPDIF_IN
PAGE2
SCL_SRC
PAGE2
SDA_SRC
PAGE2
IN_D2P
PAGE2
IN_D2N
PAGE2
IN_D1P
PAGE2
IN_D1N
PAGE2
IN_D0P
PAGE2
IN_D0N
PAGE2
IN_CLKP
PAGE2
IN_CLKN
PAGE2
HPD_SRC
PAGE2
I2C_EN_PIN
PAGE5
SCL_CTL
PAGE5
SDA_CTL
PAGE5
PRE_SEL
PAGE5
EQ_SEL_A0
PAGE5
HDMI_SEL#_TEST_A1
PAGE5
TX_TERM_CTL
PAGE5
SIG_EN
PAGE5
SWAP/POL
PAGE5
CEC_EN
PAGE4
VSADJ
PAGE5
HDMI_SCL_SRC
PAGE2,3
HDMI_SDA_SRC
PAGE2,3
HPD_SNK
PAGE4
HPD_SRC_CONN
PAGE2
C12
0.1uF
C23
0.1uF
C8
10uF
C18
0.1uF
R129
0
C13
0.1uF
C20
10uF
C9
0.1uF
DP159RGZ
U1
48 PIN RGZ, HSIO
SWAP/POL
1
IN_D2P
2
IN_D2N
3
HPD_SRC
4
IN_D1P
5
IN_D1N
6
GND1
7
IN_D0P
8
IN_D0N
9
I2C_EN/PIN
10
IN_CLKP
11
IN_CLKN
12
OUT_CLKN
25
OUT_CLKP
26
HDMI_SEL#/A1
27
OUT_D0N
28
OUT_D0P
29
GND3
30
OUT_D1N
31
OUT_D1P
32
HPD_SNK
33
OUT_D2N
34
OUT_D2P
35
TX_TERM_CTL
36
V
D
D
4
3
7
SCL_SNK
38
S
D
A
_
S
N
K
3
9
SLEW
_C
T
L
4
0
G
N
D
4
4
1
O
E
4
2
V
C
C
2
4
3
AUX_SRCN/ARC_O
U
T
44
A
U
X
_
S
R
C
P
/S
P
D
IF
_
IN
4
5
SCL_SRC
46
S
D
A
_
S
R
C
4
7
V
D
D
5
4
8
V
C
C
1
1
3
V
D
D
1
1
4
S
C
L
_
C
T
L
1
5
S
D
A
_
C
T
L
1
6
S
IG
_
E
N
1
7
C
E
C
_
E
N
/N
C
1
8
G
N
D
2
1
9
P
R
E_
SE
L
2
0
E
Q
_
S
E
L
/A
0
2
1
V
S
AD
J
2
2
V
D
D
2
2
3
V
D
D
3
2
4
P
A
D
4
9
C19
0.1uF
C14
0.1uF
C11
0.1uF
C10
0.1uF
C15
0.1uF
C16
0.1uF
R130
1K
0402
5%
C24
0.1uF
C21
0.1uF
R131
0
C25
0.1uF
C22
0.01uF
C17
0.1uF
EVM Schematics
15
SLLU225A – August 2015 – Revised March 2018
Copyright © 2015–2018, Texas Instruments Incorporated
DP159RGZ Evaluation Module
Figure 8. DP159RGZ