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EVM Overview
4.2
Power Requirements
The following sections describe the power requirements of this EVM.
4.2.1
Supply Voltage
The dc power supply for the digital section (V
DD
) of this EVM is dedicated to 5 V via the J3-1 terminal or
J6-10 terminal and is referenced to ground through the J3-2 and J6-5 terminals respectively.
The dc power supply requirements for the analog section of this EVM are as follows; the V
CC
and V
SS
are
typically ±15 V but can range from ±4.5 V minimum to ±18 V maximum and connect through J1-3 and
J1-1 respectively, or through J6-1 and J6-2 terminals. The 5VA connects through J6-3 and the -5VA
connects through J6-4. All of the analog power supplies are referenced to analog ground through J1-2 and
J6-6 terminals.
The V
CC
supply sources the positive rail of the external output amplifier, U4A as well as the
current-to-voltage converter amplifier, U5. The supply for the voltage reference circuit composed of U2, U3
and U4B also uses V
CC
. The negative rail of U4 and U5 is supplied by V
SS
, though U4 can also be
selected to be connected to AGND via W5 jumper. The external output amplifier is installed as an option
to provide output signal conditioning or for other output configurations desired
CAUTION
To avoid potential damage to the EVM board, make sure that the correct cables
are connected to their respective terminals as labeled on the EVM board.
Stresses above the maximum listed voltage ratings may cause permanent
damage to the device.
4.2.2
Reference Voltage
The externally generated ±10-VDC precision voltage reference is jumper selectable via W1. Either 10 V or
–10 V can be applied to the DAC8801/11 reference input if the onboard dc source is selected. The
external reference voltage source is supplied by the REF102, which is a 2.5 ppm/°C with excellent line
regulation and stability. The -10-V reference is created by using the INA105. The ±10-VDC reference
provides the DAC8801/11 voltage output range. An external reference source of up to ±15 VAC can be
applied to the reference input via TP1 if an ac source is desired.
4.3
EVM Basic Functions
This EVM is designed primarily as a functional evaluation platform to test certain functional characteristics
of the DAC8801/11 MDAC. Functional evaluation of the installed MDAC device can be accomplished with
the use of any microprocessor, TI DSP or some sort of a signal/waveform generator.
The headers J2 and P2 are the connectors provided to allow the control signals and data required to
interface a host processor or waveform generator to the DAC8801/11EVM using a custom built cable.
The MDAC output can be monitored through the J4 header connector. In addition, the MDAC output (via
U5) can be connected to the output operational amplifier, U4A, by using a jumper across pins 5 and 6 or
pins 7 and 8 of J4 header. The output operational amplifier, U4A, is configurable through J5, W5 and W15
for any desired waveform characteristic.
3
SLAU151A – January 2005 – Revised November 2009
DAC8801/11EVM
Copyright © 2005–2009, Texas Instruments Incorporated
