Texas Instruments DAC5686 EVM, Руководство пользователя

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2.3.3 DAC A(B) Gain
2.3.4 NCO
2.3.5 Additional Control/Monitor Registers
3 Physical Description
3.1 PCB Layout
3.1.1 PCB Layout Recommendations
Physical Description
•
DAC Coarse Gain: Sets coarse gain of DAC A(B) full scale current. Range is 0 to 15. See the
DAC5686 data sheet for full scale gain equation.
•
DAC Fine Gain: Sets fine gain of DAC A(B) full scale current. Range is -128 to 127. See the DAC5686
data sheet for full scale gain equation.
•
DAC DCOffset: Sets DAC A(B) DC offset register. Range is -1024 to 1023.
•
Sleep: DAC A(B) sleeps when set, operational when cleared.
•
NCO DDS: Sets NCO DDS registers. See the DAC5686 data sheet for the formula.
•
NCO Phase: Sets initial NCO phase registers. See the DAC5686 data sheet for more information.
•
Pll Port Config: Selection of this button will bring up a separate window that shows the parallel port
configuration of the software. The EVMMenu should be loaded with "DAC EVM".
•
Quit: Quits the operation of the DAC5686 software.
•
Version: Displays the version of the silicon. If a version of 0 is read then the communication is not
functioning and an error message will be displayed.
This chapter describes the physical characteristics and PCB layout of the EVM and lists the components
used on the module.
The EVM is constructed on a 4-layer, 6.5-inch x 4.7-inch, 0.055-inch thick PCB using FR-4 material.
Figure 5 through Figure 8 show the PCB layout for the EVM.
The DAC5686 clock is sensitive to fast transitions of input data on pins 34, 35, and 36 (DA15, DA14, and
DA13) due to coupling to DVDD pin 32. The noise-like spectral energy of the data line couples into the
DAC clock circuit power pin, resulting in increased jitter. To minimize the jitter, a 10-
Ω
series resistor along
with a 10-pF capacitor to ground has been added to DVDD pin 32 on the EVM. Pin 32 only draws around
2 mA of current and the 0.02-V voltage drop across the resistor is acceptable for DVDD voltages within
the MINIMUM and MAXIMUM specifications. It is also recommended that the transition rate of the data
input lines be slowed by inserting series resistors near the data source. The optimized value of the series
resistor depends on the capacitance of the trace between the series resistor and the DAC5686 input pin.
For a 2-3 inch trace, a 22-
Ω
to 47-
Ω
resistor are recommended.
SLWU006E – December 2004 – Revised March 2007 DAC5686 EVM 15
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