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Software Control
2.2.1.3
PLL Settings
Figure 3. PLL Configuration
Follow the steps below to configure the PLL.
1. Enable PLL
2. Uncheck PLL reset and PLL sleep
3. Set M and N ratio such that F
DAC
= (M)/(N) x Fref
4. For the DAC3482, DAC3484, and DAC34H84: Set the prescaler such that the F
DAC
x prescaler is within
3.3GHz and 4GHz.
5. For the DAC34SH84, Set the prescaler such that the F
DAC
x prescaler is within 2.7GHz and 3.3GHz.
6. Set VCO Bias Tune to
“
1
”
7. Charge Pump setting
(a) If stability (P x M) is less than 120, then set to
“
Single
”
.
(b) If stability (P x M) is greater than 120, then set to
“
Double
”
or install external loop filter
8. Adjust the Freq. Tune (coarse tune) accordingly. For additional information, see the relevant DAC348x
data sheet.
6
DAC348x EVM
SLAU432
–
February 2012
Copyright
©
2012, Texas Instruments Incorporated