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PCB Layout Guideline

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PCB Layout Guideline

1. To obtain optimal performance, the power input capacitors, connected from input to PGND, must be

placed as close as possible to the integrated circuit (IC).

2. The output inductor must be placed close to the IC and the output capacitor connected between the

inductor and PGND of the IC. The intent is to minimize the current path loop area from the SW pin
through the LC filter and back to the PGND pin. To prevent high-frequency oscillation problems, proper
layout to minimize high-frequency current path loop is critical.

3. The sense resistor must be adjacent to the junction of the inductor and output capacitor. Route the

sense leads connected across the RSNS back to the IC, close to each other (minimize loop area) or
on top of each other on adjacent layers. (Do not route the sense leads through a high-current path.)

4. Place all decoupling capacitors close to their respective IC pin and as close as possible to PGND. (Do

not place components such that routing interrupts power stage currents.) All small control signals must
be routed away from the high-current paths.

5. The printed-circuit board must have a ground plane (return) connected directly to the return of all

components through vias (two vias per capacitor for power-stage capacitors, two vias for the IC PGND,
one via per capacitor for small-signal components). A star ground design approach is typically used to
keep circuit block currents isolated (high-power/low-power small-signal) which reduces noise-coupling
and ground-bounce issues. A single ground plane for this design gives good results. With this small
layout and a single ground plane, no ground-bounce issue occurs, and having the components
segregated minimizes coupling between signals.

6. The high-current charge paths into VBUS, PMID, and from the SW pins must be sized appropriately for

the maximum charge current in order to avoid voltage drops in these traces. The PGND pins must be
connected to the ground plane to return current through the internal low-side FET.

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bq2415x RGY EVM (HPA255)

SLUU366A – March 2010 – Revised April 2010

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Copyright © 2010, Texas Instruments Incorporated

Содержание bq2415x

Страница 1: ...ic and Bill of Materials 9 4 1 Board Layout 9 4 2 Schematic 12 4 3 Bill of Materials 13 List of Figures 1 Connections of the HPA172 Kit 5 2 Original Test Setup for HPA255 bq2415x EVM 5 3 Main Window o...

Страница 2: ...bq2415x data sheet SLUS942 1 3 I O Description Table 1 Input Output Jack Descriptions Jack Description J1 DC AC adapter or USB positive output J1 DC AC adapter or USB negative output J2 BAT Charger po...

Страница 3: ...F LO ON ON 1 5 Recommended Operating Conditions Table 4 Recommended Operating Conditions Min Typ Max Unit Notes Supply voltage VIN Input voltage from ac adapter input 4 5 6 V Battery voltage VBAT Volt...

Страница 4: ...Check specified parameters A B If measured values are not within specified limits the unit under test has failed Observe A B Observe if A B occur If they do not occur the unit under test has failed As...

Страница 5: ...nt voltage mode Set the output voltage to 2 5 V E Turn off Load 2 F Connect J5 to HPA172 kit by 10 pin ribbon cable Connect the USB port of the HPA172 kit to the USB port of the computer The connectio...

Страница 6: ...ure Iin 93 mA 5 mA 4 Select Charge Current to 1 25 A select Input Current Limit to 500 mA Measure Ichrg 750 mA 100 mA Measure Iin 475 mA 25 mA 5 Check Disable Charger Turn off PS1 turn off Load 2 and...

Страница 7: ...PA172 Ribbon Cable V www ti com Test Summary Figure 4 Test Setup for HPA255 3 Turn on PS1 output 4 Software setup Change Operation Mode to Boost Mode Measure V J1 DC DC 5 V 0 2 V 5 Enable Load 1 Measu...

Страница 8: ...nents such that routing interrupts power stage currents All small control signals must be routed away from the high current paths 5 The printed circuit board must have a ground plane return connected...

Страница 9: ...ill of Materials 4 Board Layout Schematic and Bill of Materials 4 1 Board Layout Figure 5 Top Layer 9 SLUU366A March 2010 Revised April 2010 bq2415x RGY EVM HPA255 Submit Documentation Feedback Copyri...

Страница 10: ...ic and Bill of Materials www ti com Figure 6 Bottom Layer Figure 7 Top Assembly 10 bq2415x RGY EVM HPA255 SLUU366A March 2010 Revised April 2010 Submit Documentation Feedback Copyright 2010 Texas Inst...

Страница 11: ...com Board Layout Schematic and Bill of Materials Figure 8 Top Silk 11 SLUU366A March 2010 Revised April 2010 bq2415x RGY EVM HPA255 Submit Documentation Feedback Copyright 2010 Texas Instruments Incor...

Страница 12: ...Layout Schematic and Bill of Materials www ti com 4 2 Schematic 12 bq2415x RGY EVM HPA255 SLUU366A March 2010 Revised April 2010 Submit Documentation Feedback Copyright 2010 Texas Instruments Incorpo...

Страница 13: ...1 1 1 1 1 L1 1 0mH 2 5mmx2mm 1 0mH 30 1 5A 0 11x0 09 inch LQM2HPN1R0MJ0 or Murata or FDK or MIPS2520D1R0 or TOKO or MDT2520 CN1R0M or CP1008 Inter Technical 1 1 1 1 1 1 1 R1 0 068 Resistor Chip 68m 12...

Страница 14: ...duct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application enginee...

Страница 15: ...h statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury...

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