4.4
Parallel Data Bus Connector—J17
www.ti.com
Parallel EVM Site
The parallel data connector used on the Interface Card is a 48-pin male header. Typical parallel EVMs
have a data bus that is a minimum of 16 bits wide and a maximum of 24 bits. Bus expansion is done in
4-bit increments. Data is aligned LSB to LSB.
shows the parallel data bus connections.
Table 10. Parallel Control Connections
Signal
Pin Number
Signal
D0
1
2
DGND
D1
3
4
DGND
D2
5
6
DGND
D3
7
8
DGND
D4
9
10
DGND
D5
11
12
DGND
D6
13
14
DGND
D7
15
16
DGND
D8
17
18
DGND
D9
19
20
DGND
D10
21
22
DGND
D11
23
24
DGND
D12
25
26
DGND
D13
27
28
DGND
D14
29
30
DGND
D15
31
32
DGND
D16
33
34
DGND
D17
35
36
DGND
D18
37
38
DGND
D19
39
40
DGND
D20
41
42
DGND
D21
43
44
DGND
D22
45
46
DGND
D23
47
48
DGND
SLAU104C – May 2004 – Revised March 2009
List of Tables
7
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