Tews Technologies TIP670, Руководство пользователя

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TIP670 User Manual Issue 1.3 Page 8 of 19
4 IP Addressing
The TIP670 is accessed in the I/O space through the following set of four direct accessible registers
implemented in the Z8536 controller:
Address Symbol Description Size (Bit)
0x01 PORTC Port C Data Bits D00-D07 8
0x03 PORTB Port B Data Bits D00-D07 8
0x05 PORTA Port A Data Bits D00-D07 8
0x07 CIOCSR CIO Command and Status Register 8
Figure 4-1 : Register Set
4.1 Indirect Addressable Registers
In addition to the above mentioned direct access registers the Z8536 CIO has 48 indirect
addressable registers. These indirect addressable registers are used for the mode specification
and for the control of ports and counter/timers.
Not all of the indirect addressable registers are required for the operation of the TIP670. For a
more detailed description of the function of these registers see the Z8536 data sheet which is
part of the Engineering Documentation TIP670-ED.
Address Symbol Description Size (Bit)
0x00 MICR Master Interrupt Control 8
0x01 MCCR Master Configuration Control 8
0x02 PAIV Port A Interrupt Vector 8
0x03 PBIV Port B Interrupt Vector 8
0x04 CTIV Counter / Timer Interrupt Vector 8
0x05 PCDP Port C Data Path Polarity 8
0x06 PCDD Port C Data Direction 8
0x07 PCSC Port C Special I/O Control 8
0x08 PACS Port A Control / Status 8
0x09 PBCS Port B Control / Status 8
0x0A C1CSR Counter / Timer 1 Command / Status 8
0x0B C2CSR Counter / Timer 2 Command / Status 8
0x0C C3CSR Counter / Timer 3 Command / Status 8
0x0D PADR Port A Data Register 8
0x0E PBDR Port B Data Register 8
0x0F PCDR Port C Data Register 8
0x10 CT1CM Counter / Timer 1 Current Count MSB 8
0x11 CT1CL Counter / Timer 1 Current Count LSB 8
0x12 CT2CM Counter / Timer 2 Current Count MSB 8