TAMC900 User Manual Issue 2.0.1
Page 21 of 71
4.6.3 Channel Setup
The recommend steps to setup a channel respectively a channel group is described afterwards.
•
Disable all channels in the Channel Group before manipulation
•
Configure ADCs sample rate
o
DCM first if necessary (to have the correct clock at the ADCs’ input)
o
Sample Clock Configuration afterwards
•
Define corresponding Channel Group Trigger Mode
o
Pre-Trigger Data Size if necessary
•
Provide DMA descriptors and assign a base address to the corresponding channel register
•
Set Channel Configuration register
•
Enable the channel in Global Channel Configuration register (this will start processing)
4.7 Channel Logic
4.7.1 Channel Reset
Beside the general reset, that has an effect on the complete module, every channel can be reset separately.
Such a reset causes that
•
a channel trigger event (if one has occurred) is reset
•
channel DMA information (e.g. remaining window size) are obsolete
•
the DMA base descriptor as defined through the register map is loaded
•
the current processed DMA transmission is aborted
•
the channel DMA status register is cleared
If a channel is reset while others are running, this channel cannot be started until the others
of the corresponding channel group have finished.
4.7.2 Channel Activation
The activation is based on the Global Channel Configuration register and the Channel Configuration register.
Both have to be configured appropriately.
The significant settings in the Channel Configuration register are the Channel Enable Bit (
CHEN
) and the
Channel DMA Enable Bit (
DMAEN
).
Bit
CHEN
is used to activate (physically) the concatenated ADC. This refers to the LTC2254 Output Enable
and the Shutdown steering input. Valid ADC samples can only be obtained if the sample frequency is set
correctly and this bit is set. Stopping a channel should not be done with this steering bit since the DMA
operation will not stop.
