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Telit Wireless Solutions NL865H2 Series, Руководство по конструкции аппаратуры

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NL865H2 Hardware Design Guide   

1VV0301616 Rev. 7 

Page 

32

 of 

67 

2020-04-20

 

 

 

WAKEUP from PSM 

5.1.1. 

Pin Description 

 

The module is provided by an input line named WAKE* used to wakeup the module from 
the deep power saving state (PSM). The signal is active LOW. 
The following figure is the signal waveform: 

 

 

5.1.2. 

Application Example 

 

The 

WAKEUP

 circuit design is divided into two types:1.8V and non-1.8V.

 

The 1.8V 

WAKEUP

 reference circuit design is shown below. The resistance value is for reference 

only. Please fine tune according to the specific customer’s application: 

 

 

 

 

Содержание NL865H2 Series

Страница 1: ...01 2017 Mod 0818 2017 01 Rev 0 NL865H2 Hardware Design Guide 1VV0301616 Rev 7 2020 04 20...

Страница 2: ...for copyrighted material including the exclusive right to copy reproduce in any form distribute and make derivative works of the copyrighted material Accordingly any copyrighted material of Telit and...

Страница 3: ...vities IV Trademarks TELIT and the Stylized T Logo are registered in Trademark Office All other product or service names are the property of their respective owners V Third Party Rights The software m...

Страница 4: ...NL865H2 Hardware Design Guide 1VV0301616 Rev 7 Page 4 of 67 2020 04 20 APPLICABILITY TABLE PRODUCTS NL865H2 W1...

Страница 5: ...hird Party Rights 3 APPLICABILITY TABLE 4 CONTENTS 5 1 INTRODUCTION 8 Scope 8 Audience 8 Contact Information Support 8 Text Conventions 9 Related Documents 10 2 GENERAL PRODUCT DESCRIPTION 11 Overview...

Страница 6: ...5 3 1 PIN DESCRIPTION 29 5 3 2 Operating levels 30 WAKEUP from PSM 32 5 1 1 Pin Description 32 5 1 2 Application Example 32 Communication ports 35 5 2 1 1 Modem serial port 1 35 5 2 1 2 Modem serial...

Страница 7: ...dimensions 52 Stencil 53 Solder paste 54 Solder Reflow 54 9 PACKAGING 56 Tray 56 Reel 58 Moisture sensitivity 59 10 SAFETY RECOMMENDATIONS 60 READ CAREFULLY 60 11 CONFORMITY ASSESSMENT ISSUES 61 Appro...

Страница 8: ...de and a starting point for properly developing your product with the Telit module Audience This document is intended for Telit customers especially system integrators about to implement their applica...

Страница 9: ...failure or bodily injury may occur Caution or Warning Alerts the user to important points about integrating the module if these points are not followed the module and end user equipment may fail or ma...

Страница 10: ...NL865H2 Hardware Design Guide 1VV0301616 Rev 7 Page 10 of 67 2020 04 20 Related Documents AT Commands User Guide 1VV0301611 NL865H2 TLB Documentation 1VV0301629...

Страница 11: ...ed for new designs requiring NBIoT coverage in a small and robust LGA package which implies easy integration and low impact on final application size and costs Ease of production and small foot print...

Страница 12: ...ive insurance Stolen vehicles tracking Internet connectivity Main features Function Features Modem 3GPP Rel 14 LTE Cat NB2 SMS support Text and PDU Real Time Clock Interfaces 2 UARTs Main with flow co...

Страница 13: ...ange 40 C to 85 C The module is fully functional within this temperature range The RF Performance may deviate from 3GPP requirements in this extended range For example receiver sensitivity or maximum...

Страница 14: ...g Data HW Flow Control 1 C109 DCD O Output for Data carrier detect signal DCD to DTE CMOS 1 8V 2 C125 RING O Output for Ring indicator signal RI to DTE CMOS 1 8V 3 C107 DSR O Output for Data set ready...

Страница 15: ...a I O 1 8V DIGITAL IO 48 GPIO_01 I O Configurable GPIO01 CMOS 1 8 Default is pull down 47 GPIO_02 I O Configurable GPIO02 CMOS 1 8 Default is pull down 46 GPIO_03 I O Configurable GPIO03 Alternate 1 I...

Страница 16: ...s 7 WAKE I Input Command for PSM Wake Up CMOS 1 8V Falling edge trigger 55 RESET I Reset CMOS 1 8V Active Low 51 VAUX O Supply Output for external accessories Power ON Monitor Power Max10mA Power Supp...

Страница 17: ...nnected 54 GND Ground Power RESERVED 8 RESERVED RESERVED 17 RESERVED RESERVED 22 RESERVED RESERVED 24 RESERVED RESERVED 25 RESERVED RESERVED 26 RESERVED RESERVED 28 RESERVED RESERVED 29 RESERVED RESER...

Страница 18: ...s not used The above pins are also necessary to debug the application when the module is assembled on it so we recommend connecting them also to dedicated test point Pad Signal Note 44 VBATT 43 VBATT_...

Страница 19: ...NL865H2 Hardware Design Guide 1VV0301616 Rev 7 Page 19 of 67 2020 04 20 LGA Pads Layout TOP VIEW...

Страница 20: ...pply Value Nominal Supply Voltage 3 3V Operating Voltage Range 3 00 V 3 60 V Extended Voltage Range 2 10 V 3 63 V VBATmin 2 10V Absolute Maximum Voltage 3 63V NOTE The Operating Voltage Range MUST nev...

Страница 21: ...itions to idle or PSM mode can be initiated in active mode Idle In idle mode the module is in light sleep and network connection is maintained module in DRX eDRX mode paging messages can be received t...

Страница 22: ...de 4 238 uA IDLE Idle mode 547 uA Operating current under NB IoT mode Band1 Pout 23dBm 133 212 mA Band2 Pout 23dBm 127 200 mA Band3 Pout 23dBm 115 186 mA Band4 Pout 23dBm 115 182 mA Band5 Pout 23dBm 1...

Страница 23: ...itching frequency regulator is preferable because of its smaller inductor size and its faster transient response This allows the regulator to respond quickly to the current peaks absorption In any cas...

Страница 24: ...alum one is rated at least 10V A protection diode should be inserted close to the power input in order to save the NL865H2 W1 from power polarity inversion Otherwise the battery connector should be do...

Страница 25: ...onsider from the thermal point of view that the device absorbs current significantly only during calls For the heat generated by the module you can consider it to be during transmission 0 99W max duri...

Страница 26: ...aces connecting the Switching output to the inductor and the switching diode must be kept as short as possible by placing the inductor and the diode very close to the power switching IC only for switc...

Страница 27: ...characteristics of the supply are Item Min Typical Max Output voltage 1 62V 1 80V 1 98V Output current 10mA Output bypass capacitor 0 1uF NOTE The Output Current MUST never be exceeded care must be ta...

Страница 28: ...gital pin CMOS 1 8 with respect to ground 0 3V 2 1V OPERATING RANGE INTERFACE LEVELS 1 8V CMOS Parameter Min Max Input high level 1 35V 1 98V Input low level 0 3V 0 63V Output high level 1 35 V 1 98V...

Страница 29: ...Restart must not be used during normal operation of the device since it does not detach the device from the network It shall be kept as an emergency exit procedure to be done in the rare case that th...

Страница 30: ...igned to the main supply level WARNING The hardware unconditional Reset must not be used during normal operation of the device since it does not detach the device from the network It shall be kept as...

Страница 31: ...s recommended to avoid having any HIGH logic level signal applied to the digital pins of the NE865H2 when the module is powered off or during a reboot transition NOTE To proper power on again the modu...

Страница 32: ...he module from the deep power saving state PSM The signal is active LOW The following figure is the signal waveform 5 1 2 Application Example The WAKEUP circuit design is divided into two types 1 8V a...

Страница 33: ...her level domain the reference circuit design is shown below The resistor and capacitance in Figure are only the recommended value and they need to be tuned according to the specific customer s applic...

Страница 34: ...e 34 of 67 2020 04 20 The following flowchart is describing the WAKE procedure Modem Wake Proc START N GOTO HW SHUTDOWN unconditional GOTO Start AT CMD PWMRON ON N Y PWMRON ON Delay 1s WAKE Low LOW De...

Страница 35: ...5H2 W1 is a 1 8V UART It differs from the PC RS232 in the signal polarity RS232 is reversed and levels The following table is listing the available signals RS232 Pin Signal NL865H2 PAD Name Usage 1 C1...

Страница 36: ...k powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the NL865H2 when the module is powered off or during an ON OFF transition 5 2 1 2 Modem s...

Страница 37: ...directions change the level from 0 1 8V to 15 15V The simplest way to translate the levels and invert the signal is by using a single chip level translator There are a multitude of them differing in...

Страница 38: ...ceiver TXS0104E In this case there is no need to use a single chip level translator NOTE In this case has to be taken in account the length of the lines on the application to avoid problems in case of...

Страница 39: ...as to be provided to adapt the different levels of the two set of signals As for the RS232 translation there are a multitude of single chip translators For example a possible translator circuit for a...

Страница 40: ...ing table shows the available GPIO on the NL865H2 W1 PAD Signal I O Default State Note 48 GPIO_01 I O Input Pull down Configurable GPIO01 47 GPIO_02 I O Input Pull down Configurable GPIO02 46 GPIO_03...

Страница 41: ...l output of the device to be connected with the GPIO input pad has interface levels different from the 1 8V CMOS then it can be buffered with an open collector transistor with a 47K pull up to VAUX NO...

Страница 42: ...modules the STAT LED needs an external transistor to drive an external LED Therefore the status indicated in the following table is reversed with respect to the pin status The STAT LED is available a...

Страница 43: ...able to read a voltage level in the range of 0 1 4 volts applied on the ADC pin input store and convert it into 10 bit word The input lines are named as ADC_IN1 and ADC_IN2 The following table is show...

Страница 44: ...hence read carefully and follow the requirements and the guidelines for a proper design The antenna and antenna transmission line on PCB for a Telit NL865H2 W1 device shall fulfil the following requir...

Страница 45: ...uidelines Ensure that the antenna line impedance is 50 ohm Keep the antenna line on the PCB as short as possible since the antenna line loss shall be less than 0 3 dB Antenna line must have uniform ch...

Страница 46: ...chosen since this kind of transmission line ensures good impedance control and can be implemented in an outer PCB layer as needed in this case A SMA female connector has been used to feed the line Th...

Страница 47: ...the pad corresponding to RF output a SMA connector has been soldered to the board in order to characterize the losses of the transmission line including the connector itself During Return Loss impedan...

Страница 48: ...Install the antenna in a place covered by the LTE signal The Antenna must be installed to provide a separation distance of at least 20 cm from all persons and must not be co located or operating in c...

Страница 49: ...NL865H2 Hardware Design Guide 1VV0301616 Rev 7 Page 49 of 67 2020 04 20 7 MECHANICAL DESIGN NOTE Dimensions in mm General Tolerance 0 15mm The tolerance is not cumulative...

Страница 50: ...5H2 Hardware Design Guide 1VV0301616 Rev 7 Page 50 of 67 2020 04 20 8 APPLICATION PCB DESIGN General The NL865H2 modules have been designed to be compliant with a standard lead free SMT process Footpr...

Страница 51: ...n the application a 1 5 mm placement inhibit area around the module It is also suggested as common rule for an SMT component to avoid having a mechanical part of the application in direct contact with...

Страница 52: ...commended for the solder pads on the PCB PCB pad dimensions It is not recommended to place via or micro via not covered by solder resist in an area of 0 3 mm around the pads unless it carries the same...

Страница 53: ...s which are occurring at the lead free process This issue should be discussed with the PCB supplier Generally the wettability of tin lead solder paste on the described surface plating is better compar...

Страница 54: ...modules after assembly Solder Reflow Recommended solder reflow profile Warning The above solder reflow profile represents the typical SAC reflow limits and does not guarantee adequate adherence of th...

Страница 55: ...80 seconds Tsmax to TL Ramp up Rate 3 C second max Time maintained above Temperature TL Time tL 217 C 60 150 seconds Peak Temperature Tp 245 0 5 C Time within 5 C of actual Peak Temperature tp 10 30 s...

Страница 56: ...7 Page 56 of 67 2020 04 20 9 PACKAGING Is possible to order in two packaging system Package on tray Package on reel Tray The NL865H2 modules are packaged on trays of 40 pieces each These trays can be...

Страница 57: ...NL865H2 Hardware Design Guide 1VV0301616 Rev 7 Page 57 of 67 2020 04 20...

Страница 58: ...NL865H2 Hardware Design Guide 1VV0301616 Rev 7 Page 58 of 67 2020 04 20 Reel The NL865H2 can be packaged on reels of 200 pieces each See figure for module positioning into the carrier...

Страница 59: ...of the Product inside of the dry bag is 12 months from the bag seal date when stored in a non condensing atmospheric environment of 40 C and 90 RH b Environmental condition during the production 30 C...

Страница 60: ...g carefully the instruction for its use Do not insert or remove the SIM when the product is in power saving mode The system integrator is responsible for the functioning of the final product therefore...

Страница 61: ...5H2 Hardware Design Guide 1VV0301616 Rev 7 Page 61 of 67 2020 04 20 11 CONFORMITY ASSESSMENT ISSUES Approvals RED RoHS and REACH Declaration of Conformity The DoC is available here https www telit com...

Страница 62: ...g carefully the instruction for its use Do not insert or remove the SIM when the product is in power saving mode The system integrator is responsible for the functioning of the final product therefore...

Страница 63: ...824 MHz 849 MHz 869 MHz 894 MHz B8 880 MHz 915 MHz 925 MHz 960 MHz B12 699 MHz 716 MHz 729 MHz 746 MHz B13 777 MHz 787 MHz 746 MHz 756 MHz B17 704 MHz 716 MHz 734 MHz 746 MHz B18 815 MHz 830 MHz 860 M...

Страница 64: ...eband Code Division Multiple Access HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access UART Universal Asynchronous Receiver Transmitter HSIC High Speed Inter Chip SIM Subscr...

Страница 65: ...20 04 20 MISO Master Input Slave Output CLK Clock MRDY Master Ready SRDY Slave Ready CS Chip Select RTC Real Time Clock PCB Printed Circuit Board ESR Equivalent Series Resistance VSWR Voltage Standing...

Страница 66: ...s 0 2019 07 17 First emission Preliminary 1 2019 08 20 Updated overall document 2 2019 09 30 Updated chapters 2 1 4 1 4 2 6 1 1 11 1 3 2019 10 10 Updated chapters 1 5 2 2 4 2019 11 08 Watermark added...

Страница 67: ...01 2017 Mod 0818 2017 01 Rev 0...

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