Tektronix BERTScope, Быстрый старт Руководство пользователя

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Preface
Table i: Features and bene fi ts
Features Bene fi ts
Accurate, robust (including spread spectrum clocking) clock
recovery Recover clock when no device or system clock is available,
jitter measurements cannot be any better than your clock
reference.
Accurate, user-controllable PLL bandwidth and peaking Compliant clock recovery for standards testing, measured
DUT jitter is dependent on PLL bandwidth
Optional jitter spectrum analysis Spectral view and measurement of jitter in signal, calibration
of jitter components for PCIe 5 Gb/s receiver test
Optional 24 MHz loop bandwidth For PCIe Gen 3 testing
Key speci fi cations
Table ii: Key speci fi cations
Characteristic CR125A CR175A CR286A
CR175A
Option HS CR286A
Option HS
Input sensitivity (typical) 100 mV single-ended
50 mV differential
40 mV single-ended
20 mV differential
Input data rate coverage 150 Mb/s to
12.5 Gb/s 150 Mb/s to
17.5 Gb/s 150 Mb/s to
28.6 Gb/s 150 Mb/s to
17.5 Gb/s 150 Mb/s to
28.6 Gb/s
Data insertion loss
2 dB (min), 2.6 dB (typical), 3 dB (max),
up to 12.5 Gb/s 1
–
Data input voltage range –5 V (min), +5 V (max) –5 V (min), +5 V (max) 1 V
p-p
(max)
Measured edge density
accuracy ±1%, up to 14.3 Gb/s, ±3% >14.3 Gb/s
Equalization range 0 to 10 dB
Data output
Up to 12.5 Gb/s 1
–
1 Data through path only recommended for use below 12.5 Gb/s. Use external pick-off tees and terminate output connector above 12.5 Gb/s.
x CR125A, CR175A, CR286A Quick Start User Manual