
Preface
Preface
This document provides high-level information on theTektronix BERTScope Bit Error Rate Analyzers. It helps you install
and use the instruments.
Features and bene
fi
ts
The BERTScope series of instruments provide the following features and bene
fi
ts:
Pattern Generation and Error Analysis, High-speed BER Measurements up to 28.6 Gb/s
Integrated, Calibrated Stress Generation to Address the Stressed Receiver Sensitivity and Clock Recovery Jitter
Tolerance Test Requirements for a Wide Range of Standards
Electrical Stressed Eye Testing for the following:
PCI Express
10/40/100 Gb Ethernet
SFP+/SFI
XFP/XFI
OIF/CEI
Fibre Channel (FC8, FC16, FC32)
SATA
USB 3.0
In
fi
niBand (SDR, QDR, FDR, EDR)
Jitter Tolerance Compliance Template Testing with Margin Testing
Fast Input Rise Time / High Input Bandwidth Error Detector for Accurate Signal Integrity Analysis
Physical Layer Test Suite with Mask Testing, Jitter Peak, BER Contour, and Q-factor Analysis for Comprehensive Testing
with Standard or User-de
fi
ned Libraries of Jitter Tolerance Templates
Integrated Eye Diagram Analysis with BER Correlation
Optional Jitter Map Comprehensive Jitter Decomposition – with Long Pattern (PRBS-31) Jitter Triangulation to Extend
BER-based Jitter Decomposition Beyond the Limitations of Dual Dirac TJ, DJ, and RJ for a Comprehensive Breakdown
of Jitter Subcomponents
Patented Error Location Analysis enables Rapid Understanding of your BER Performance Limitations and Assess
Deterministic versus Random Errors, Perform Detailed Pattern-dependent Error Analysis, Perform Error Burst Analysis,
or Error-free Interval Analysis
Tektronix BERTScope Bit Error Rate Analyzers Quick Start User Manual
xi